121 lines
3.4 KiB
Diff
121 lines
3.4 KiB
Diff
add mtrr support (Avi Kivity)
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program mtrrs for cpu 0. Doesn't support >=4G at the moment.
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Signed-off-by: Avi Kivity <avi@qumranet.com>
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Index: bochs/bios/rombios32.c
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===================================================================
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--- bochs.orig/bios/rombios32.c
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+++ bochs/bios/rombios32.c
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@@ -64,6 +64,23 @@ typedef unsigned long long uint64_t;
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#define BIOS_TMP_STORAGE 0x00030000 /* 64 KB used to copy the BIOS to shadow RAM */
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+#define MSR_MTRRcap 0x000000fe
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+#define MSR_MTRRfix64K_00000 0x00000250
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+#define MSR_MTRRfix16K_80000 0x00000258
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+#define MSR_MTRRfix16K_A0000 0x00000259
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+#define MSR_MTRRfix4K_C0000 0x00000268
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+#define MSR_MTRRfix4K_C8000 0x00000269
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+#define MSR_MTRRfix4K_D0000 0x0000026a
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+#define MSR_MTRRfix4K_D8000 0x0000026b
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+#define MSR_MTRRfix4K_E0000 0x0000026c
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+#define MSR_MTRRfix4K_E8000 0x0000026d
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+#define MSR_MTRRfix4K_F0000 0x0000026e
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+#define MSR_MTRRfix4K_F8000 0x0000026f
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+#define MSR_MTRRdefType 0x000002ff
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+
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+#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
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+#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
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+
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static inline void outl(int addr, int val)
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{
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asm volatile ("outl %1, %w0" : : "d" (addr), "a" (val));
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@@ -135,6 +152,19 @@ static inline void putc(int c)
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outb(INFO_PORT, c);
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}
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+static uint64_t rdmsr(unsigned index)
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+{
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+ unsigned long long ret;
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+
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+ asm ("rdmsr" : "=A"(ret) : "c"(index));
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+ return ret;
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+}
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+
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+static void wrmsr(unsigned index, uint64_t val)
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+{
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+ asm volatile ("wrmsr" : : "c"(index), "A"(val));
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+}
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+
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static inline int isdigit(int c)
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{
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return c >= '0' && c <= '9';
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@@ -469,6 +499,54 @@ static int cmos_readb(int addr)
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return inb(0x71);
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}
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+void setup_mtrr(void)
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+{
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+ int i, vcnt, fix, wc;
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+ uint32_t mtrr_cap;
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+ union {
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+ uint8_t valb[8];
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+ uint64_t val;
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+ } u;
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+ uint64_t vbase, vmask;
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+
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+ mtrr_cap = rdmsr(MSR_MTRRcap);
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+ vcnt = mtrr_cap & 0xff;
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+ fix = mtrr_cap & 0x100;
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+ wc = mtrr_cap & 0x400;
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+ if (!vcnt || !fix)
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+ return;
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+ u.val = 0;
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+ for (i = 0; i < 8; ++i)
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+ if (ram_size >= 65536 * (i + 1))
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+ u.valb[i] = 6;
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+ wrmsr(MSR_MTRRfix64K_00000, u.val);
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+ u.val = 0;
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+ for (i = 0; i < 8; ++i)
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+ if (ram_size >= 65536 * 8 + 16384 * (i + 1))
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+ u.valb[i] = 6;
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+ wrmsr(MSR_MTRRfix16K_80000, u.val);
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+ wrmsr(MSR_MTRRfix16K_A0000, 0);
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+ wrmsr(MSR_MTRRfix4K_C0000, 0);
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+ wrmsr(MSR_MTRRfix4K_C8000, 0);
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+ wrmsr(MSR_MTRRfix4K_D0000, 0);
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+ wrmsr(MSR_MTRRfix4K_D8000, 0);
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+ wrmsr(MSR_MTRRfix4K_E0000, 0);
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+ wrmsr(MSR_MTRRfix4K_E8000, 0);
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+ wrmsr(MSR_MTRRfix4K_F0000, 0);
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+ wrmsr(MSR_MTRRfix4K_F8000, 0);
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+ vbase = 0;
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+ --vcnt; /* leave one mtrr for VRAM */
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+ for (i = 0; i < vcnt && vbase < ram_size; ++i) {
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+ vmask = (1ull << 40) - 1;
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+ while (vbase + vmask + 1 > ram_size)
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+ vmask >>= 1;
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+ wrmsr(MTRRphysBase_MSR(i), vbase | 6);
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+ wrmsr(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
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+ vbase += vmask + 1;
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+ }
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+ wrmsr(MSR_MTRRdefType, 0xc00);
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+}
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+
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void ram_probe(void)
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{
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if (cmos_readb(0x34) | cmos_readb(0x35))
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@@ -482,6 +560,7 @@ void ram_probe(void)
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ebda_cur_addr = ((*(uint16_t *)(0x40e)) << 4) + 0x380;
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BX_INFO("ebda_cur_addr: 0x%08lx\n", ebda_cur_addr);
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#endif
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+ setup_mtrr();
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}
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/****************************************************/
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