127 lines
3.4 KiB
Diff
127 lines
3.4 KiB
Diff
smp mtrr support (Avi Kivity)
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Signed-off-by: Avi Kivity <avi@qumranet.com>
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Index: bochs/bios/rombios.h
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===================================================================
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--- bochs.orig/bios/rombios.h
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+++ bochs/bios/rombios.h
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@@ -56,6 +56,7 @@
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#define ACPI_DATA_SIZE 0x00010000L
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#define PM_IO_BASE 0xb000
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#define SMB_IO_BASE 0xb100
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+#define SMP_MSR_ADDR 0xf010
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// Define the application NAME
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#if defined(BX_QEMU)
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Index: bochs/bios/rombios32.c
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===================================================================
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--- bochs.orig/bios/rombios32.c
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+++ bochs/bios/rombios32.c
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@@ -472,6 +472,23 @@ void qemu_cfg_read(uint8_t *buf, int len
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}
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#endif
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+void init_smp_msrs(void)
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+{
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+ *(uint32_t *)SMP_MSR_ADDR = 0;
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+}
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+
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+void wrmsr_smp(uint32_t index, uint64_t val)
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+{
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+ static struct { uint32_t ecx, eax, edx; } *p = (void *)SMP_MSR_ADDR;
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+
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+ wrmsr(index, val);
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+ p->ecx = index;
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+ p->eax = val;
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+ p->edx = val >> 32;
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+ ++p;
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+ p->ecx = 0;
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+}
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+
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void uuid_probe(void)
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{
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#ifdef BX_QEMU
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@@ -519,32 +536,32 @@ void setup_mtrr(void)
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for (i = 0; i < 8; ++i)
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if (ram_size >= 65536 * (i + 1))
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u.valb[i] = 6;
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- wrmsr(MSR_MTRRfix64K_00000, u.val);
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+ wrmsr_smp(MSR_MTRRfix64K_00000, u.val);
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u.val = 0;
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for (i = 0; i < 8; ++i)
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if (ram_size >= 65536 * 8 + 16384 * (i + 1))
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u.valb[i] = 6;
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- wrmsr(MSR_MTRRfix16K_80000, u.val);
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- wrmsr(MSR_MTRRfix16K_A0000, 0);
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- wrmsr(MSR_MTRRfix4K_C0000, 0);
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- wrmsr(MSR_MTRRfix4K_C8000, 0);
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- wrmsr(MSR_MTRRfix4K_D0000, 0);
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- wrmsr(MSR_MTRRfix4K_D8000, 0);
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- wrmsr(MSR_MTRRfix4K_E0000, 0);
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- wrmsr(MSR_MTRRfix4K_E8000, 0);
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- wrmsr(MSR_MTRRfix4K_F0000, 0);
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- wrmsr(MSR_MTRRfix4K_F8000, 0);
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+ wrmsr_smp(MSR_MTRRfix16K_80000, u.val);
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+ wrmsr_smp(MSR_MTRRfix16K_A0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_C0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_C8000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_D0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_D8000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_E0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_E8000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_F0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_F8000, 0);
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vbase = 0;
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--vcnt; /* leave one mtrr for VRAM */
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for (i = 0; i < vcnt && vbase < ram_size; ++i) {
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vmask = (1ull << 40) - 1;
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while (vbase + vmask + 1 > ram_size)
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vmask >>= 1;
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- wrmsr(MTRRphysBase_MSR(i), vbase | 6);
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- wrmsr(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
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+ wrmsr_smp(MTRRphysBase_MSR(i), vbase | 6);
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+ wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
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vbase += vmask + 1;
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}
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- wrmsr(MSR_MTRRdefType, 0xc00);
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+ wrmsr_smp(MSR_MTRRdefType, 0xc00);
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}
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void ram_probe(void)
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@@ -2263,6 +2280,8 @@ void rombios32_init(uint32_t *s3_resume_
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qemu_cfg_port = qemu_cfg_port_probe();
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#endif
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+ init_smp_msrs();
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+
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ram_probe();
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cpu_probe();
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Index: bochs/bios/rombios32start.S
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===================================================================
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--- bochs.orig/bios/rombios32start.S
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+++ bochs/bios/rombios32start.S
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@@ -49,6 +49,18 @@ _start:
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smp_ap_boot_code_start:
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xor %ax, %ax
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mov %ax, %ds
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+
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+ mov $SMP_MSR_ADDR, %ebx
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+11:
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+ mov 0(%ebx), %ecx
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+ test %ecx, %ecx
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+ jz 12f
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+ mov 4(%ebx), %eax
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+ mov 8(%ebx), %edx
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+ wrmsr
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+ add $12, %ebx
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+ jmp 11b
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+12:
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lock incw smp_cpus
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1:
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hlt
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