Yongbok Kim 59488dda1f target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0 ... MFHC0 and MTHC0 used to handle EntryLo0 and EntryLo1 registers only, and placing ELPA flag checks before switch statement were technically correct. However, after adding handling more registers, these checks should be moved to act only in cases of handling EntryLo0 and EntryLo1. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>		2018-08-16 19:18:45 +02:00
..
cp0_timer.c
cpu-qom.h	mips: MIPSCPU model subclasses	2017-09-21 13:25:30 +01:00
cpu.c	qdev: use device_class_set_parent_realize/unrealize/reset()	2018-02-05 13:54:38 +01:00
cpu.h	target/mips: Add CP0 BadInstrX register	2018-08-16 19:18:45 +02:00
dsp_helper.c	Remove unnecessary variables for function return value	2018-05-20 08:48:13 +03:00
gdbstub.c	target/mips: Fix gdbstub to read/write 64 bit FP registers	2018-06-27 20:13:50 +02:00
helper.c	target/mips: Don't update BadVAddr register in Debug Mode	2018-08-16 19:18:45 +02:00
helper.h
internal.h	accel/tcg: add size paremeter in tlb_fill()	2018-01-25 16:02:24 +01:00
kvm_mips.h
kvm.c
lmi_helper.c
machine.c	target/mips: Add CP0 BadInstrX register	2018-08-16 19:18:45 +02:00
Makefile.objs
mips-defs.h	linux-user: Tidy and enforce reserved_va initialization	2017-10-16 16:00:56 +03:00
mips-semi.c
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-17 15:27:15 -07:00
op_helper.c	target/mips: Don't update BadVAddr register in Debug Mode	2018-08-16 19:18:45 +02:00
TODO
trace-events
translate_init.inc.c	rename included C files to foo.inc.c, remove osdep.h	2018-05-11 14:33:40 +02:00
translate.c	target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0	2018-08-16 19:18:45 +02:00