Paolo Bonzini e3af7c788b target/i386: introduce x86_ld*_code ... These take care of advancing s->pc, and will provide a unified point where to check for the 15-byte instruction length limit. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2017-10-16 18:03:53 +02:00
..
alpha	tcg: remove addr argument from lookup_tb_ptr	2017-10-10 07:37:10 -07:00
arm	tcg: remove addr argument from lookup_tb_ptr	2017-10-10 07:37:10 -07:00
cris	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
hppa	tcg: remove addr argument from lookup_tb_ptr	2017-10-10 07:37:10 -07:00
i386	target/i386: introduce x86_ld*_code	2017-10-16 18:03:53 +02:00
lm32	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
m68k	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
microblaze	target: [tcg] Use a generic enum for DISAS_ values	2017-09-06 08:06:47 -07:00
mips	tcg: remove addr argument from lookup_tb_ptr	2017-10-10 07:37:10 -07:00
moxie	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
nios2	nios2: define tcg_env	2017-10-16 18:03:52 +02:00
openrisc	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
ppc	build: remove CONFIG_LIBDECNUMBER	2017-10-16 18:03:52 +02:00
s390x	tcg: remove addr argument from lookup_tb_ptr	2017-10-10 07:37:10 -07:00
sh4	tcg: remove addr argument from lookup_tb_ptr	2017-10-10 07:37:10 -07:00
sparc	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
tilegx	tilegx: replace cpu_tilegx_init() with cpu_generic_init()	2017-09-01 11:54:24 -03:00
tricore	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
unicore32	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00
xtensa	qom/cpu: move cpu_model null check to cpu_class_by_name()	2017-10-09 23:21:52 -03:00