154 lines
4.0 KiB
C++
154 lines
4.0 KiB
C++
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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static void maybe_nanbox_load(TCGv freg, MemOp mop)
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{
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if ((mop & MO_SIZE) == MO_32) {
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gen_nanbox_s(freg, freg);
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}
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}
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static bool gen_fload_i(DisasContext *ctx, arg_fr_i *a, MemOp mop)
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{
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TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv temp = NULL;
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if (a->imm) {
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temp = tcg_temp_new();
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tcg_gen_addi_tl(temp, addr, a->imm);
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addr = temp;
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}
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tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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maybe_nanbox_load(cpu_fpr[a->fd], mop);
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if (temp) {
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tcg_temp_free(temp);
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}
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return true;
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}
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static bool gen_fstore_i(DisasContext *ctx, arg_fr_i *a, MemOp mop)
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{
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TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv temp = NULL;
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if (a->imm) {
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temp = tcg_temp_new();
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tcg_gen_addi_tl(temp, addr, a->imm);
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addr = temp;
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}
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tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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if (temp) {
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tcg_temp_free(temp);
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}
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return true;
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}
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static bool gen_floadx(DisasContext *ctx, arg_frr *a, MemOp mop)
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{
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TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
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TCGv addr = tcg_temp_new();
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tcg_gen_add_tl(addr, src1, src2);
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tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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maybe_nanbox_load(cpu_fpr[a->fd], mop);
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tcg_temp_free(addr);
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return true;
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}
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static bool gen_fstorex(DisasContext *ctx, arg_frr *a, MemOp mop)
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{
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TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
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TCGv addr = tcg_temp_new();
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tcg_gen_add_tl(addr, src1, src2);
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tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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tcg_temp_free(addr);
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return true;
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}
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static bool gen_fload_gt(DisasContext *ctx, arg_frr *a, MemOp mop)
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{
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TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
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TCGv addr = tcg_temp_new();
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gen_helper_asrtgt_d(cpu_env, src1, src2);
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tcg_gen_add_tl(addr, src1, src2);
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tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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maybe_nanbox_load(cpu_fpr[a->fd], mop);
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tcg_temp_free(addr);
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return true;
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}
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static bool gen_fstore_gt(DisasContext *ctx, arg_frr *a, MemOp mop)
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{
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TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
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TCGv addr = tcg_temp_new();
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gen_helper_asrtgt_d(cpu_env, src1, src2);
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tcg_gen_add_tl(addr, src1, src2);
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tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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tcg_temp_free(addr);
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return true;
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}
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static bool gen_fload_le(DisasContext *ctx, arg_frr *a, MemOp mop)
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{
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TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
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TCGv addr = tcg_temp_new();
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gen_helper_asrtle_d(cpu_env, src1, src2);
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tcg_gen_add_tl(addr, src1, src2);
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tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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maybe_nanbox_load(cpu_fpr[a->fd], mop);
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tcg_temp_free(addr);
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return true;
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}
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static bool gen_fstore_le(DisasContext *ctx, arg_frr *a, MemOp mop)
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{
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TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
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TCGv addr = tcg_temp_new();
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gen_helper_asrtle_d(cpu_env, src1, src2);
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tcg_gen_add_tl(addr, src1, src2);
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tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
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tcg_temp_free(addr);
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return true;
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}
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TRANS(fld_s, gen_fload_i, MO_TEUL)
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TRANS(fst_s, gen_fstore_i, MO_TEUL)
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TRANS(fld_d, gen_fload_i, MO_TEUQ)
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TRANS(fst_d, gen_fstore_i, MO_TEUQ)
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TRANS(fldx_s, gen_floadx, MO_TEUL)
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TRANS(fldx_d, gen_floadx, MO_TEUQ)
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TRANS(fstx_s, gen_fstorex, MO_TEUL)
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TRANS(fstx_d, gen_fstorex, MO_TEUQ)
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TRANS(fldgt_s, gen_fload_gt, MO_TEUL)
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TRANS(fldgt_d, gen_fload_gt, MO_TEUQ)
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TRANS(fldle_s, gen_fload_le, MO_TEUL)
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TRANS(fldle_d, gen_fload_le, MO_TEUQ)
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TRANS(fstgt_s, gen_fstore_gt, MO_TEUL)
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TRANS(fstgt_d, gen_fstore_gt, MO_TEUQ)
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TRANS(fstle_s, gen_fstore_le, MO_TEUL)
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TRANS(fstle_d, gen_fstore_le, MO_TEUQ)
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