qemu-e2k/target/openrisc
Pavel Dovgalyuk b9e40bac9c target/openrisc: fix icount handling for timer instructions
This patch adds icount handling to mfspr/mtspr instructions
that may deal with hardware timers.

Signed-off-by: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
Message-Id: <161700376169.1135890.8707223959310729949.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Stafford Horne <shorne@gmail.com>
2021-04-01 10:37:20 +02:00
..
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu.c cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
cpu.h target/openrisc: Move pic_cpu code into CPU object proper 2020-12-15 12:04:30 +00:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
exception.c target/openrisc: Fix LGPL information in the file headers 2019-05-08 17:45:54 +02:00
exception.h Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
exception_helper.c target/openrisc: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
fpu_helper.c softfloat: Name compare relation enum 2020-05-19 08:41:45 -07:00
gdbstub.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
helper.h target/openrisc: Implement unordered fp comparisons 2019-09-04 12:57:59 -07:00
insns.decode target/openrisc: Implement l.adrp 2019-09-04 12:59:00 -07:00
interrupt.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
interrupt_helper.c target/openrisc: Fix LGPL version number 2019-01-30 11:01:36 +01:00
machine.c migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
meson.build meson: target 2020-08-21 06:30:35 -04:00
mmu.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
sys_helper.c target/openrisc: Remove dead code attempting to check "is timer disabled" 2020-11-17 12:56:32 +00:00
translate.c target/openrisc: fix icount handling for timer instructions 2021-04-01 10:37:20 +02:00