35dde57662
On a POWERPC PowerNV system, the host firmware is stored in a PNOR flash chip which contents is mapped on the LPC bus. This model adds a simple dummy device to map the contents of a block device in the host address space. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191021131215.3693-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
26 lines
552 B
C
26 lines
552 B
C
/*
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* QEMU PowerNV PNOR simple model
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*
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* Copyright (c) 2019, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef _PPC_PNV_PNOR_H
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#define _PPC_PNV_PNOR_H
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#define TYPE_PNV_PNOR "pnv-pnor"
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#define PNV_PNOR(obj) OBJECT_CHECK(PnvPnor, (obj), TYPE_PNV_PNOR)
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typedef struct PnvPnor {
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SysBusDevice parent_obj;
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BlockBackend *blk;
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uint8_t *storage;
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uint32_t size;
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MemoryRegion mmio;
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} PnvPnor;
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#endif /* _PPC_PNV_PNOR_H */
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