qemu-e2k/include/hw/riscv
Anup Patel 092dc6df92 hw/riscv: Remove macros for ELF BIOS image names
Now that RISC-V Spike machine can use BIN BIOS images, we remove
the macros used for ELF BIOS image names.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-01-21 15:52:57 +10:00
..
boot_opensbi.h
boot.h hw/riscv: Remove macros for ELF BIOS image names 2022-01-21 15:52:57 +10:00
microchip_pfsoc.h hw/riscv: microchip_pfsoc: Use the PLIC config helper function 2021-10-28 14:39:23 +10:00
numa.h
opentitan.h hw/riscv: opentitan: Update to the latest build 2021-10-22 23:35:47 +10:00
riscv_hart.h
shakti_c.h hw/riscv: Connect Shakti UART to Shakti platform 2021-05-11 20:02:06 +10:00
sifive_cpu.h
sifive_e.h
sifive_u.h hw/riscv: sifive_u: Use the PLIC config helper function 2021-10-28 14:39:23 +10:00
spike.h hw/riscv: spike: Allow using binary firmware as bios 2022-01-21 15:52:56 +10:00
virt.h hw/riscv: virt: Allow support for 32 cores 2022-01-08 15:46:09 +10:00