Joel Stanley 28c80f15fc watchdog/aspeed: Fix AST2600 frequency behaviour ... The AST2600 control register sneakily changed the meaning of bit 4 without anyone noticing. It no longer controls the 1MHz vs APB clock select, and instead always runs at 1MHz. The AST2500 was always 1MHz too, but it retained bit 4, making it read only. We can model both using the same fixed 1MHz calculation. Fixes: 6b2b2a703c ("hw: wdt_aspeed: Add AST2600 support") Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20191119141211.25716-10-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2019-12-16 10:46:34 +00:00
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cmsdk-apb-watchdog.h	hw/arm/stellaris: Implement watchdog timer	2019-03-05 15:55:09 +00:00
wdt_aspeed.h	watchdog/aspeed: Fix AST2600 frequency behaviour	2019-12-16 10:46:34 +00:00
wdt_diag288.h	Include hw/qdev-properties.h less	2019-08-16 13:31:53 +02:00