qemu-e2k/hw/ppc
David Gibson 768a20f3a4 spapr: Include "pre-plugged" DIMMS in ram size calculation at reset
At guest reset time, we allocate a hash page table (HPT) for the guest
based on the guest's RAM size.  If dynamic HPT resizing is not available we
use the maximum RAM size, if it is we use the current RAM size.

But the "current RAM size" calculation is incorrect - we just use the
"base" ram_size from the machine structure.  This doesn't include any
pluggable DIMMs that are already plugged at reset time.

This means that if you try to start a 'pseries' machine with a DIMM
specified on the command line that's much larger than the "base" RAM size,
then the guest will get a woefully inadequate HPT.  This can lead to a
guest freeze during boot as it runs out of HPT space during initial MMU
setup.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Greg Kurz <groug@kaod.org>
2017-12-04 11:31:22 +11:00
..
e500-ccsr.h
e500.c e500: ppce500_init_mpic() return device instead of IRQ array 2017-11-08 13:21:37 +11:00
e500.h
e500plat.c ppc: mpc8544ds/e500plat: use generic cpu_model parsing 2017-10-17 10:34:00 +11:00
fdt.c
mac_newworld.c ppc: mac_newworld: use generic cpu_model parsing 2017-10-17 10:34:00 +11:00
mac_oldworld.c ppc: mac_oldworld: use generic cpu_model parsing 2017-10-17 10:34:00 +11:00
mac.h macio: use object link between MACIO_IDE and MAC_DBDMA object 2017-09-27 13:05:41 +10:00
Makefile.objs ppc4xx_i2c: Move to hw/i2c 2017-09-08 09:30:55 +10:00
mpc8544_guts.c
mpc8544ds.c ppc: mpc8544ds/e500plat: use generic cpu_model parsing 2017-10-17 10:34:00 +11:00
pnv_bmc.c
pnv_core.c ppc: pnv: drop PnvChipClass::cpu_model field 2017-10-17 10:34:01 +11:00
pnv_lpc.c
pnv_occ.c
pnv_psi.c
pnv_xscom.c
pnv.c ppc: pnv: consolidate type definitions and batch register them 2017-10-17 10:34:01 +11:00
ppc4xx_devs.c ppc: replace cpu_model with cpu_type on ref405ep,taihu boards 2017-10-17 10:34:00 +11:00
ppc4xx_pci.c pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices 2017-10-15 05:54:43 +03:00
ppc405_boards.c hw: Use new memory_region_init_{ram, rom, rom_device}() functions 2017-07-14 17:59:42 +01:00
ppc405_uc.c ppc: replace cpu_model with cpu_type on ref405ep,taihu boards 2017-10-17 10:34:00 +11:00
ppc405.h ppc4xx: Export ECB and PLB emulation 2017-09-08 09:30:55 +10:00
ppc440_bamboo.c ppc: bamboo: use generic cpu_model parsing 2017-10-17 10:34:00 +11:00
ppc_booke.c
ppc.c ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model() 2017-10-17 10:34:00 +11:00
ppce500_spin.c
prep_systemio.c
prep.c ppc: 40p/prep: replace cpu_model with cpu_type 2017-10-17 10:34:00 +11:00
rs6000_mc.c
spapr_cpu_core.c spapr_cpu_core: rewrite machine type sanity check 2017-10-17 10:34:01 +11:00
spapr_drc.c spapr: reset DRCs after devices 2017-11-20 10:10:56 +11:00
spapr_events.c spapr_events: use QTAILQ_FOREACH_SAFE() in spapr_clear_pending_events() 2017-09-15 10:29:48 +10:00
spapr_hcall.c target/ppc: correct htab shift for hash on radix 2017-11-14 10:28:32 +11:00
spapr_iommu.c migration: pre_save return int 2017-09-27 11:35:59 +01:00
spapr_ovec.c
spapr_pci_vfio.c
spapr_pci.c spapr_pci: fail gracefully with non-pseries machine types 2017-10-17 10:34:01 +11:00
spapr_rng.c spapr_rng: Convert to DEFINE_PROP_LINK 2017-07-14 12:04:43 +02:00
spapr_rtas_ddw.c
spapr_rtas.c ppc: spapr: Make VCPU ID handling private to SPAPR 2017-09-08 09:30:55 +10:00
spapr_rtc.c hw/ppc/spapr_rtc: Mark the RTC device with user_creatable = false 2017-08-22 21:26:46 +10:00
spapr_vio.c
spapr.c spapr: Include "pre-plugged" DIMMS in ram size calculation at reset 2017-12-04 11:31:22 +11:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
virtex_ml507.c ppc: virtex-ml507: replace cpu_model with cpu_type 2017-10-17 10:34:00 +11:00