.. |
alpha
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
arm
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trace-events: fix code style: print 0x before hex numbers
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2017-08-01 12:13:07 +01:00 |
cris
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
hppa
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
i386
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target/i386: set rip_offset for some SSE4.1 instructions
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2017-08-08 10:40:20 +02:00 |
lm32
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
m68k
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m68k/translate: fix incorrect copy/paste
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2017-07-31 13:06:39 +03:00 |
microblaze
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
mips
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target/mips: Fix RDHWR CC with icount
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2017-08-02 22:18:13 +01:00 |
moxie
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
nios2
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
openrisc
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
ppc
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target/ppc: Add stub implementation of the PSSCR
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2017-08-09 11:46:44 +10:00 |
s390x
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target/s390x: Fix CSST for 16-byte store
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2017-08-03 10:58:50 -07:00 |
sh4
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
sparc
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trace-events: fix code style: print 0x before hex numbers
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2017-08-01 12:13:07 +01:00 |
tilegx
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |
tricore
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qemu-system-tricore: segfault when entering "x 0" on the monitor
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2017-07-31 13:06:38 +03:00 |
unicore32
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unicore32: abort when entering "x 0" on the monitor
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2017-08-14 13:06:54 +03:00 |
xtensa
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tcg: Pass generic CPUState to gen_intermediate_code()
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2017-07-19 14:45:16 -07:00 |