1c685a9026
Some PHB implementations, eg. PAPR used on pseries machine, act like a regular PCI bus rather than a PCIe bus, but allow access to the PCIe extended config space anyway. Introduce a new PCI bus class method to modelize this behaviour and use it when adjusting the config space size limit during accesses. No behaviour change for existing PCI bus types. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155414130271.574858.4253514266378127489.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
51 lines
1.2 KiB
C
51 lines
1.2 KiB
C
#ifndef QEMU_PCI_BUS_H
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#define QEMU_PCI_BUS_H
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#include "hw/pci/pci.h"
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/*
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* PCI Bus datastructures.
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*
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* Do not access the following members directly;
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* use accessor functions in pci.h
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*/
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typedef struct PCIBusClass {
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/*< private >*/
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BusClass parent_class;
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/*< public >*/
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bool (*is_root)(PCIBus *bus);
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int (*bus_num)(PCIBus *bus);
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uint16_t (*numa_node)(PCIBus *bus);
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bool (*allows_extended_config_space)(PCIBus *bus);
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} PCIBusClass;
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struct PCIBus {
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BusState qbus;
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PCIIOMMUFunc iommu_fn;
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void *iommu_opaque;
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uint8_t devfn_min;
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uint32_t slot_reserved_mask;
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pci_set_irq_fn set_irq;
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pci_map_irq_fn map_irq;
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pci_route_irq_fn route_intx_to_irq;
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void *irq_opaque;
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PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
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PCIDevice *parent_dev;
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MemoryRegion *address_space_mem;
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MemoryRegion *address_space_io;
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QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
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QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
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/* The bus IRQ state is the logical OR of the connected devices.
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Keep a count of the number of devices with raised IRQs. */
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int nirq;
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int *irq_count;
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Notifier machine_done;
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};
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#endif /* QEMU_PCI_BUS_H */
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