133 lines
3.9 KiB
C
133 lines
3.9 KiB
C
/*
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* QEMU model of the Xilinx eFuse core
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*
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* Copyright (c) 2015 Xilinx Inc.
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*
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* Written by Edgar E. Iglesias <edgari@xilinx.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef XLNX_EFUSE_H
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#define XLNX_EFUSE_H
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#include "sysemu/block-backend.h"
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#include "hw/qdev-core.h"
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#define TYPE_XLNX_EFUSE "xlnx,efuse"
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OBJECT_DECLARE_SIMPLE_TYPE(XlnxEFuse, XLNX_EFUSE);
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struct XlnxEFuse {
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DeviceState parent_obj;
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BlockBackend *blk;
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bool blk_ro;
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uint32_t *fuse32;
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DeviceState *dev;
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bool init_tbits;
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uint8_t efuse_nr;
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uint32_t efuse_size;
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uint32_t *ro_bits;
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uint32_t ro_bits_cnt;
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};
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/**
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* xlnx_efuse_calc_crc:
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* @data: an array of 32-bit words for which the CRC should be computed
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* @u32_cnt: the array size in number of 32-bit words
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* @zpads: the number of 32-bit zeros prepended to @data before computation
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*
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* This function is used to compute the CRC for an array of 32-bit words,
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* using a Xilinx-specific data padding.
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*
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* Returns: the computed 32-bit CRC
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*/
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uint32_t xlnx_efuse_calc_crc(const uint32_t *data, unsigned u32_cnt,
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unsigned zpads);
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/**
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* xlnx_efuse_get_bit:
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* @s: the efuse object
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* @bit: the efuse bit-address to read the data
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*
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* Returns: the bit, 0 or 1, at @bit of object @s
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*/
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bool xlnx_efuse_get_bit(XlnxEFuse *s, unsigned int bit);
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/**
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* xlnx_efuse_set_bit:
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* @s: the efuse object
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* @bit: the efuse bit-address to be written a value of 1
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*
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* Returns: true on success, false on failure
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*/
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bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit);
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/**
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* xlnx_efuse_k256_check:
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* @s: the efuse object
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* @crc: the 32-bit CRC to be compared with
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* @start: the efuse bit-address (which must be multiple of 32) of the
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* start of a 256-bit array
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*
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* This function computes the CRC of a 256-bit array starting at @start
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* then compares to the given @crc
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*
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* Returns: true of @crc == computed, false otherwise
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*/
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bool xlnx_efuse_k256_check(XlnxEFuse *s, uint32_t crc, unsigned start);
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/**
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* xlnx_efuse_tbits_check:
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* @s: the efuse object
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*
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* This function inspects a number of efuse bits at specific addresses
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* to see if they match a validation pattern. Each pattern is a group
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* of 4 bits, and there are 3 groups.
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*
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* Returns: a 3-bit mask, where a bit of '1' means the corresponding
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* group has a valid pattern.
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*/
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uint32_t xlnx_efuse_tbits_check(XlnxEFuse *s);
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/**
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* xlnx_efuse_get_row:
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* @s: the efuse object
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* @bit: the efuse bit address for which a 32-bit value is read
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*
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* Returns: the entire 32 bits of the efuse, starting at a bit
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* address that is multiple of 32 and contains the bit at @bit
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*/
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static inline uint32_t xlnx_efuse_get_row(XlnxEFuse *s, unsigned int bit)
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{
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if (!(s->fuse32)) {
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return 0;
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} else {
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unsigned int row_idx = bit / 32;
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assert(row_idx < (s->efuse_size * s->efuse_nr / 32));
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return s->fuse32[row_idx];
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}
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}
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#endif
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