ead4cf04f8
The sun4m architecture has one 'system' timer and one timer per CPU. The CPU timers can be configured in two modes: * 22 bits Counter/Timer. Periodic interrupts. * 54 bits User timer. For profiling. In this mode, the Run/Stop bit controls the timer. The run/stop bit controls the timer only when it is in "User" mode, but its state shall be persistent. Signed-off-by: Olivier Danet <odanet@caramail.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
||
---|---|---|
.. | ||
a9gtimer.c | ||
allwinner-a10-pit.c | ||
arm_mptimer.c | ||
arm_timer.c | ||
cadence_ttc.c | ||
digic-timer.c | ||
ds1338.c | ||
etraxfs_timer.c | ||
exynos4210_mct.c | ||
exynos4210_pwm.c | ||
exynos4210_rtc.c | ||
grlib_gptimer.c | ||
hpet.c | ||
i8254_common.c | ||
i8254.c | ||
imx_epit.c | ||
imx_gpt.c | ||
lm32_timer.c | ||
m48t59.c | ||
Makefile.objs | ||
mc146818rtc.c | ||
milkymist-sysctl.c | ||
omap_gptimer.c | ||
omap_synctimer.c | ||
pl031.c | ||
puv3_ost.c | ||
pxa2xx_timer.c | ||
sh_timer.c | ||
slavio_timer.c | ||
tusb6010.c | ||
twl92230.c | ||
xilinx_timer.c |