Mark Cave-Ayland cffc331a31 cuda.c: add delay to setting of SR_INT bit ...

MacOS 9 is racy when it comes to accessing the shift register. Fix this by
introducing a small delay between data accesses and raising the SR_INT
interrupt bit.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

2015-11-12 13:15:55 +11:00

..

macio

cuda.c: add delay to setting of SR_INT bit

2015-11-12 13:15:55 +11:00

a9scu.c

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applesmc.c

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arm11scu.c

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arm_integrator_debug.c

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arm_l2x0.c

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arm_sysctl.c

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cbus.c

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debugexit.c

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eccmemctl.c

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edu.c

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exynos4210_pmu.c

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imx_ccm.c

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ivshmem.c

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Makefile.objs

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max111x.c

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milkymist-hpdmc.c

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milkymist-pfpu.c

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mst_fpga.c

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omap_clk.c

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omap_gpmc.c

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omap_l4.c

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omap_sdrc.c

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2015-09-07 10:39:27 +01:00

omap_tap.c

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pc-testdev.c

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pci-testdev.c

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puv3_pm.c

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pvpanic.c

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sga.c

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slavio_misc.c

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stm32f2xx_syscfg.c

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tmp105.c

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tmp105.h

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vmport.c

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zynq_slcr.c

misc: zynq_slcr: Fix MMIO writes

2015-10-16 13:13:47 +01:00