Yongbok Kim ca1ffd14ed target/mips: Add I6500 core configuration ... Add I6500 core configuration. Note that this configuration is supported only on best-effort basis due to the lack of certain features in QEMU. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>		2019-01-24 17:48:33 +01:00
..
cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2017-09-21 13:24:34 +01:00
cpu-qom.h	mips: MIPSCPU model subclasses	2017-09-21 13:25:30 +01:00
cpu.c	target/mips: Add disassembler support for nanoMIPS	2018-10-25 22:13:33 +02:00
cpu.h	target/mips: Correct the second argument type of cpu_supports_isa()	2019-01-24 17:48:33 +01:00
dsp_helper.c	Remove unnecessary variables for function return value	2018-05-20 08:48:13 +03:00
gdbstub.c	target/mips: Fix gdbstub to read/write 64 bit FP registers	2018-06-27 20:13:50 +02:00
helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-18 20:37:20 +02:00
helper.h	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	2019-01-18 16:53:28 +01:00
internal.h	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	2019-01-18 16:53:28 +01:00
kvm_mips.h
kvm.c	mips: introduce internal.h and cleanup cpu.h	2017-09-21 13:24:34 +01:00
lmi_helper.c
machine.c	target/mips: Add CP0 register MemoryMapID	2019-01-18 16:53:28 +01:00
Makefile.objs
mips-defs.h	target/mips: Define a bit for MXU in insn_flags	2018-10-29 14:13:47 +01:00
mips-semi.c
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-17 15:27:15 -07:00
op_helper.c	target/mips: Update ITU to utilize SAARI and SAAR CP0 registers	2019-01-18 16:53:28 +01:00
TODO
trace-events
translate_init.inc.c	target/mips: Add I6500 core configuration	2019-01-24 17:48:33 +01:00
translate.c	target/mips: nanoMIPS: Fix branch handling	2019-01-24 17:48:33 +01:00