qemu-e2k/target/mips
Fredrik Noring ed4f49ba9b target/mips: Define the R5900 CPU
The primary purpose of this change is to support programs compiled by
GCC for the R5900 target and thereby run R5900 Linux distributions, for
example Gentoo.

GCC in version 7.3, by itself, by inspection of the GCC source code
and inspection of the generated machine code, for the R5900 target,
only emits two instructions that are specific to the R5900: the three-
operand MULT and MULTU. GCC and libc also emit certain MIPS III
instructions that are not part of the R5900 ISA. They are normally
trapped and emulated by the Linux kernel, and therefore need to be
treated accordingly by QEMU.

A program compiled by GCC is taken to mean source code compiled by GCC
under the restrictions above. One can, with the apparent limitations,
with a bit of effort obtain a fully functioning operating system such
as R5900 Gentoo. Strictly speaking, programs need not be compiled by
GCC to make use of this change.

Instructions and other facilities of the R5900 not implemented by this
change are intended to signal provisional exceptions. One such example
is the FPU that is not compliant with IEEE 754-1985 in system mode. It
is therefore provisionally disabled. In user space the FPU is trapped
and emulated by IEEE 754-1985 compliant software in the kernel, and
this is handled accordingly by QEMU. Another example is the 93
multimedia instructions specific to the R5900 that generate provisional
reserved instruction exception signals.

One of the benefits of running a Linux distribution under QEMU is that
programs can be compiled with a native compiler, where the host and
target are the same, as opposed to a cross-compiler, where they are
not the same. This is especially important in cases where the target
hardware does not have the resources to run a native compiler.

Problems with cross-compilation are often related to host and target
differences in integer sizes, pointer sizes, endianness, machine code,
ABI, etc. Sometimes cross-compilation is not even supported by the
build script for a given package. One effective way to avoid those
problems is to replace the cross-compiler with a native compiler. This
change of compilation methods does not resolve the inherent problems
with cross-compilation.

The native compiler naturally replaces the cross-compiler, because one
typically uses one or the other, and preferably the native compiler
when the circumstances admit this. The native compiler is also a good
test case for the R5900 QEMU user mode. Additionally, Gentoo is well-
known for compiling and installing its packages from sources.

This change has been tested with Gentoo compiled for R5900, including
native compilation of several packages under QEMU.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24 15:20:31 +02:00
..
cp0_timer.c mips: introduce internal.h and cleanup cpu.h 2017-09-21 13:24:34 +01:00
cpu-qom.h mips: MIPSCPU model subclasses 2017-09-21 13:25:30 +01:00
cpu.c qdev: use device_class_set_parent_realize/unrealize/reset() 2018-02-05 13:54:38 +01:00
cpu.h target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
dsp_helper.c Remove unnecessary variables for function return value 2018-05-20 08:48:13 +03:00
gdbstub.c target/mips: Fix gdbstub to read/write 64 bit FP registers 2018-06-27 20:13:50 +02:00
helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
helper.h target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
internal.h target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
kvm_mips.h
kvm.c mips: introduce internal.h and cleanup cpu.h 2017-09-21 13:24:34 +01:00
lmi_helper.c
machine.c target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
Makefile.objs mips: move hw/mips/cputimer.c to target/mips/ 2017-09-21 13:24:34 +01:00
mips-defs.h target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constants 2018-10-24 15:07:42 +02:00
mips-semi.c
msa_helper.c target/mips: Remove floatX_maybe_silence_nan from conversions 2018-05-17 15:27:15 -07:00
op_helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
TODO
trace-events docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
translate_init.inc.c target/mips: Define the R5900 CPU 2018-10-24 15:20:31 +02:00
translate.c target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only 2018-10-24 15:20:31 +02:00