PTC field has 8 bits, PVPE has 4. We plan to use the "hw/registerfields.h" API with MIPS CPU definitions (target/mips/cpu.h). Meanwhile we use magic 8 and 4. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201204222622.2743175-6-f4bug@amsat.org> |
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Kconfig | ||
boston.c | ||
cps.c | ||
fuloong2e.c | ||
gt64xxx_pci.c | ||
jazz.c | ||
malta.c | ||
meson.build | ||
mips_int.c | ||
mipssim.c | ||
trace-events | ||
trace.h |