344f4b1581
Implement the Arm TrustZone Memory Protection Controller, which sits in front of RAM and allows secure software to configure it to either pass through or reject transactions. We implement the MPC as a QEMU IOMMU, which will direct transactions either through to the devices and memory behind it or to a special "never works" AddressSpace if they are blocked. This initial commit implements the skeleton of the device: * it always permits accesses * it doesn't implement most of the registers * it doesn't implement the interrupt or other behaviour for blocked transactions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20180620132032.28865-2-peter.maydell@linaro.org
155 lines
2.5 KiB
Makefile
155 lines
2.5 KiB
Makefile
# Default configuration for arm-softmmu
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include pci.mak
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include usb.mak
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CONFIG_VGA=y
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CONFIG_NAND=y
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CONFIG_ECC=y
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CONFIG_SERIAL=y
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CONFIG_SERIAL_ISA=y
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CONFIG_PTIMER=y
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CONFIG_SD=y
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CONFIG_MAX7310=y
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CONFIG_WM8750=y
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CONFIG_TWL92230=y
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CONFIG_TSC2005=y
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CONFIG_LM832X=y
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CONFIG_TMP105=y
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CONFIG_TMP421=y
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CONFIG_PCA9552=y
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CONFIG_STELLARIS=y
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CONFIG_STELLARIS_INPUT=y
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CONFIG_STELLARIS_ENET=y
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CONFIG_SSD0303=y
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CONFIG_SSD0323=y
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CONFIG_DDC=y
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CONFIG_SII9022=y
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CONFIG_ADS7846=y
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CONFIG_MAX111X=y
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CONFIG_SSI=y
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CONFIG_SSI_SD=y
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CONFIG_SSI_M25P80=y
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CONFIG_LAN9118=y
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CONFIG_SMC91C111=y
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CONFIG_ALLWINNER_EMAC=y
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CONFIG_IMX_FEC=y
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CONFIG_FTGMAC100=y
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CONFIG_DS1338=y
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CONFIG_PFLASH_CFI01=y
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CONFIG_PFLASH_CFI02=y
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CONFIG_MICRODRIVE=y
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CONFIG_USB=y
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CONFIG_USB_MUSB=y
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CONFIG_USB_EHCI_SYSBUS=y
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CONFIG_PLATFORM_BUS=y
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CONFIG_VIRTIO_MMIO=y
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CONFIG_ARM11MPCORE=y
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CONFIG_A9MPCORE=y
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CONFIG_A15MPCORE=y
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CONFIG_ARM_V7M=y
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CONFIG_NETDUINO2=y
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CONFIG_ARM_GIC=y
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CONFIG_ARM_GIC_KVM=$(CONFIG_KVM)
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CONFIG_ARM_TIMER=y
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CONFIG_ARM_MPTIMER=y
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CONFIG_A9_GTIMER=y
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CONFIG_PL011=y
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CONFIG_PL022=y
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CONFIG_PL031=y
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CONFIG_PL041=y
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CONFIG_PL050=y
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CONFIG_PL061=y
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CONFIG_PL080=y
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CONFIG_PL110=y
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CONFIG_PL181=y
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CONFIG_PL190=y
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CONFIG_PL310=y
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CONFIG_PL330=y
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CONFIG_CADENCE=y
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CONFIG_XGMAC=y
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CONFIG_EXYNOS4=y
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CONFIG_PXA2XX=y
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CONFIG_I2C=y
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CONFIG_BITBANG_I2C=y
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CONFIG_FRAMEBUFFER=y
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CONFIG_XILINX_SPIPS=y
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CONFIG_ZYNQ_DEVCFG=y
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CONFIG_ARM11SCU=y
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CONFIG_A9SCU=y
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CONFIG_DIGIC=y
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CONFIG_MARVELL_88W8618=y
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CONFIG_OMAP=y
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CONFIG_TSC210X=y
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CONFIG_BLIZZARD=y
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CONFIG_ONENAND=y
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CONFIG_TUSB6010=y
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CONFIG_IMX=y
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CONFIG_MAINSTONE=y
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CONFIG_MPS2=y
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CONFIG_NSERIES=y
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CONFIG_RASPI=y
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CONFIG_REALVIEW=y
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CONFIG_ZAURUS=y
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CONFIG_ZYNQ=y
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CONFIG_STM32F2XX_TIMER=y
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CONFIG_STM32F2XX_USART=y
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CONFIG_STM32F2XX_SYSCFG=y
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CONFIG_STM32F2XX_ADC=y
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CONFIG_STM32F2XX_SPI=y
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CONFIG_STM32F205_SOC=y
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CONFIG_CMSDK_APB_TIMER=y
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CONFIG_CMSDK_APB_UART=y
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CONFIG_MPS2_FPGAIO=y
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CONFIG_MPS2_SCC=y
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CONFIG_TZ_MPC=y
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CONFIG_TZ_PPC=y
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CONFIG_IOTKIT=y
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CONFIG_IOTKIT_SECCTL=y
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CONFIG_VERSATILE=y
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CONFIG_VERSATILE_PCI=y
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CONFIG_VERSATILE_I2C=y
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CONFIG_PCI_GENERIC=y
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CONFIG_VFIO_XGMAC=y
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CONFIG_VFIO_AMD_XGBE=y
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CONFIG_SDHCI=y
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CONFIG_INTEGRATOR=y
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CONFIG_INTEGRATOR_DEBUG=y
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CONFIG_ALLWINNER_A10_PIT=y
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CONFIG_ALLWINNER_A10_PIC=y
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CONFIG_ALLWINNER_A10=y
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CONFIG_FSL_IMX6=y
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CONFIG_FSL_IMX31=y
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CONFIG_FSL_IMX25=y
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CONFIG_FSL_IMX7=y
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CONFIG_IMX_I2C=y
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CONFIG_PCIE_PORT=y
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CONFIG_XIO3130=y
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CONFIG_IOH3420=y
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CONFIG_I82801B11=y
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CONFIG_ACPI=y
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CONFIG_SMBIOS=y
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CONFIG_ASPEED_SOC=y
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CONFIG_GPIO_KEY=y
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CONFIG_MSF2=y
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CONFIG_FW_CFG_DMA=y
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CONFIG_XILINX_AXI=y
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CONFIG_PCI_DESIGNWARE=y
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CONFIG_STRONGARM=y
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CONFIG_HIGHBANK=y
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CONFIG_MUSICPAL=y
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