277 lines
9.0 KiB
C
277 lines
9.0 KiB
C
/*
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* QEMU PowerPC pSeries Logical Partition NUMA associativity handling
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*
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* Copyright IBM Corp. 2020
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*
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* Authors:
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* Daniel Henrique Barboza <danielhb413@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "hw/ppc/spapr_numa.h"
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#include "hw/pci-host/spapr.h"
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#include "hw/ppc/fdt.h"
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/* Moved from hw/ppc/spapr_pci_nvlink2.c */
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#define SPAPR_GPU_NUMA_ID (cpu_to_be32(1))
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static bool spapr_numa_is_symmetrical(MachineState *ms)
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{
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int src, dst;
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int nb_numa_nodes = ms->numa_state->num_nodes;
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NodeInfo *numa_info = ms->numa_state->nodes;
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for (src = 0; src < nb_numa_nodes; src++) {
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for (dst = src; dst < nb_numa_nodes; dst++) {
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if (numa_info[src].distance[dst] !=
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numa_info[dst].distance[src]) {
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return false;
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}
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}
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}
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return true;
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}
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void spapr_numa_associativity_init(SpaprMachineState *spapr,
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MachineState *machine)
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{
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SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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int nb_numa_nodes = machine->numa_state->num_nodes;
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int i, j, max_nodes_with_gpus;
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/*
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* For all associativity arrays: first position is the size,
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* position MAX_DISTANCE_REF_POINTS is always the numa_id,
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* represented by the index 'i'.
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*
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* This will break on sparse NUMA setups, when/if QEMU starts
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* to support it, because there will be no more guarantee that
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* 'i' will be a valid node_id set by the user.
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*/
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for (i = 0; i < nb_numa_nodes; i++) {
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spapr->numa_assoc_array[i][0] = cpu_to_be32(MAX_DISTANCE_REF_POINTS);
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spapr->numa_assoc_array[i][MAX_DISTANCE_REF_POINTS] = cpu_to_be32(i);
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}
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/*
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* Initialize NVLink GPU associativity arrays. We know that
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* the first GPU will take the first available NUMA id, and
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* we'll have a maximum of NVGPU_MAX_NUM GPUs in the machine.
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* At this point we're not sure if there are GPUs or not, but
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* let's initialize the associativity arrays and allow NVLink
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* GPUs to be handled like regular NUMA nodes later on.
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*/
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max_nodes_with_gpus = nb_numa_nodes + NVGPU_MAX_NUM;
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for (i = nb_numa_nodes; i < max_nodes_with_gpus; i++) {
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spapr->numa_assoc_array[i][0] = cpu_to_be32(MAX_DISTANCE_REF_POINTS);
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for (j = 1; j < MAX_DISTANCE_REF_POINTS; j++) {
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uint32_t gpu_assoc = smc->pre_5_1_assoc_refpoints ?
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SPAPR_GPU_NUMA_ID : cpu_to_be32(i);
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spapr->numa_assoc_array[i][j] = gpu_assoc;
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}
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spapr->numa_assoc_array[i][MAX_DISTANCE_REF_POINTS] = cpu_to_be32(i);
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}
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/*
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* Legacy NUMA guests (pseries-5.1 and older, or guests with only
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* 1 NUMA node) will not benefit from anything we're going to do
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* after this point.
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*/
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if (spapr_machine_using_legacy_numa(spapr)) {
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return;
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}
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if (!spapr_numa_is_symmetrical(machine)) {
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error_report("Asymmetrical NUMA topologies aren't supported "
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"in the pSeries machine");
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exit(EXIT_FAILURE);
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}
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}
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void spapr_numa_write_associativity_dt(SpaprMachineState *spapr, void *fdt,
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int offset, int nodeid)
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{
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_FDT((fdt_setprop(fdt, offset, "ibm,associativity",
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spapr->numa_assoc_array[nodeid],
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sizeof(spapr->numa_assoc_array[nodeid]))));
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}
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static uint32_t *spapr_numa_get_vcpu_assoc(SpaprMachineState *spapr,
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PowerPCCPU *cpu)
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{
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uint32_t *vcpu_assoc = g_new(uint32_t, VCPU_ASSOC_SIZE);
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int index = spapr_get_vcpu_id(cpu);
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/*
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* VCPUs have an extra 'cpu_id' value in ibm,associativity
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* compared to other resources. Increment the size at index
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* 0, put cpu_id last, then copy the remaining associativity
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* domains.
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*/
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vcpu_assoc[0] = cpu_to_be32(MAX_DISTANCE_REF_POINTS + 1);
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vcpu_assoc[VCPU_ASSOC_SIZE - 1] = cpu_to_be32(index);
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memcpy(vcpu_assoc + 1, spapr->numa_assoc_array[cpu->node_id] + 1,
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(VCPU_ASSOC_SIZE - 2) * sizeof(uint32_t));
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return vcpu_assoc;
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}
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int spapr_numa_fixup_cpu_dt(SpaprMachineState *spapr, void *fdt,
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int offset, PowerPCCPU *cpu)
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{
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g_autofree uint32_t *vcpu_assoc = NULL;
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vcpu_assoc = spapr_numa_get_vcpu_assoc(spapr, cpu);
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/* Advertise NUMA via ibm,associativity */
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return fdt_setprop(fdt, offset, "ibm,associativity", vcpu_assoc,
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VCPU_ASSOC_SIZE * sizeof(uint32_t));
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}
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int spapr_numa_write_assoc_lookup_arrays(SpaprMachineState *spapr, void *fdt,
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int offset)
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{
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MachineState *machine = MACHINE(spapr);
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int nb_numa_nodes = machine->numa_state->num_nodes;
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int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1;
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uint32_t *int_buf, *cur_index, buf_len;
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int ret, i;
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/* ibm,associativity-lookup-arrays */
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buf_len = (nr_nodes * MAX_DISTANCE_REF_POINTS + 2) * sizeof(uint32_t);
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cur_index = int_buf = g_malloc0(buf_len);
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int_buf[0] = cpu_to_be32(nr_nodes);
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/* Number of entries per associativity list */
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int_buf[1] = cpu_to_be32(MAX_DISTANCE_REF_POINTS);
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cur_index += 2;
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for (i = 0; i < nr_nodes; i++) {
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/*
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* For the lookup-array we use the ibm,associativity array,
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* from numa_assoc_array. without the first element (size).
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*/
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uint32_t *associativity = spapr->numa_assoc_array[i];
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memcpy(cur_index, ++associativity,
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sizeof(uint32_t) * MAX_DISTANCE_REF_POINTS);
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cur_index += MAX_DISTANCE_REF_POINTS;
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}
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ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf,
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(cur_index - int_buf) * sizeof(uint32_t));
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g_free(int_buf);
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return ret;
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}
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/*
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* Helper that writes ibm,associativity-reference-points and
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* max-associativity-domains in the RTAS pointed by @rtas
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* in the DT @fdt.
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*/
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void spapr_numa_write_rtas_dt(SpaprMachineState *spapr, void *fdt, int rtas)
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{
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SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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uint32_t refpoints[] = {
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cpu_to_be32(0x4),
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cpu_to_be32(0x4),
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cpu_to_be32(0x2),
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};
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uint32_t nr_refpoints = ARRAY_SIZE(refpoints);
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uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0);
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uint32_t maxdomains[] = {
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cpu_to_be32(4),
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maxdomain,
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maxdomain,
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maxdomain,
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cpu_to_be32(spapr->gpu_numa_id),
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};
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if (smc->pre_5_1_assoc_refpoints) {
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nr_refpoints = 2;
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}
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_FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points",
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refpoints, nr_refpoints * sizeof(refpoints[0])));
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_FDT(fdt_setprop(fdt, rtas, "ibm,max-associativity-domains",
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maxdomains, sizeof(maxdomains)));
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}
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static target_ulong h_home_node_associativity(PowerPCCPU *cpu,
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SpaprMachineState *spapr,
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target_ulong opcode,
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target_ulong *args)
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{
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g_autofree uint32_t *vcpu_assoc = NULL;
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target_ulong flags = args[0];
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target_ulong procno = args[1];
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PowerPCCPU *tcpu;
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int idx, assoc_idx;
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/* only support procno from H_REGISTER_VPA */
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if (flags != 0x1) {
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return H_FUNCTION;
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}
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tcpu = spapr_find_cpu(procno);
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if (tcpu == NULL) {
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return H_P2;
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}
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/*
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* Given that we want to be flexible with the sizes and indexes,
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* we must consider that there is a hard limit of how many
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* associativities domain we can fit in R4 up to R9, which would be
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* 12 associativity domains for vcpus. Assert and bail if that's
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* not the case.
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*/
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G_STATIC_ASSERT((VCPU_ASSOC_SIZE - 1) <= 12);
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vcpu_assoc = spapr_numa_get_vcpu_assoc(spapr, tcpu);
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/* assoc_idx starts at 1 to skip associativity size */
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assoc_idx = 1;
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#define ASSOCIATIVITY(a, b) (((uint64_t)(a) << 32) | \
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((uint64_t)(b) & 0xffffffff))
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for (idx = 0; idx < 6; idx++) {
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int32_t a, b;
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/*
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* vcpu_assoc[] will contain the associativity domains for tcpu,
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* including tcpu->node_id and procno, meaning that we don't
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* need to use these variables here.
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*
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* We'll read 2 values at a time to fill up the ASSOCIATIVITY()
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* macro. The ternary will fill the remaining registers with -1
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* after we went through vcpu_assoc[].
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*/
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a = assoc_idx < VCPU_ASSOC_SIZE ?
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be32_to_cpu(vcpu_assoc[assoc_idx++]) : -1;
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b = assoc_idx < VCPU_ASSOC_SIZE ?
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be32_to_cpu(vcpu_assoc[assoc_idx++]) : -1;
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args[idx] = ASSOCIATIVITY(a, b);
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}
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#undef ASSOCIATIVITY
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return H_SUCCESS;
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}
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static void spapr_numa_register_types(void)
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{
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/* Virtual Processor Home Node */
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spapr_register_hypercall(H_HOME_NODE_ASSOCIATIVITY,
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h_home_node_associativity);
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}
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type_init(spapr_numa_register_types)
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