6ce7100e7f
This patch allows qpci_iomap to return the size of the BAR mapping that it created, to allow driver applications (e.g, ahci-test) to make determinations about the suitability or the mapping size, or in the specific case of AHCI, how many ports are supported by the HBA. Signed-off-by: John Snow <jsnow@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
81 lines
2.6 KiB
C
81 lines
2.6 KiB
C
/*
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* libqos PCI bindings
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*
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* Copyright IBM, Corp. 2012-2013
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef LIBQOS_PCI_H
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#define LIBQOS_PCI_H
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#include <stdint.h>
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#define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn))
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typedef struct QPCIDevice QPCIDevice;
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typedef struct QPCIBus QPCIBus;
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struct QPCIBus
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{
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uint8_t (*io_readb)(QPCIBus *bus, void *addr);
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uint16_t (*io_readw)(QPCIBus *bus, void *addr);
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uint32_t (*io_readl)(QPCIBus *bus, void *addr);
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void (*io_writeb)(QPCIBus *bus, void *addr, uint8_t value);
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void (*io_writew)(QPCIBus *bus, void *addr, uint16_t value);
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void (*io_writel)(QPCIBus *bus, void *addr, uint32_t value);
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uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset);
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uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset);
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uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset);
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void (*config_writeb)(QPCIBus *bus, int devfn,
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uint8_t offset, uint8_t value);
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void (*config_writew)(QPCIBus *bus, int devfn,
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uint8_t offset, uint16_t value);
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void (*config_writel)(QPCIBus *bus, int devfn,
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uint8_t offset, uint32_t value);
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void *(*iomap)(QPCIBus *bus, QPCIDevice *dev, int barno, uint64_t *sizeptr);
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void (*iounmap)(QPCIBus *bus, void *data);
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};
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struct QPCIDevice
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{
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QPCIBus *bus;
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int devfn;
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};
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void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
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void (*func)(QPCIDevice *dev, int devfn, void *data),
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void *data);
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QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn);
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void qpci_device_enable(QPCIDevice *dev);
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uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset);
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uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset);
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uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset);
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void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value);
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void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value);
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void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value);
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uint8_t qpci_io_readb(QPCIDevice *dev, void *data);
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uint16_t qpci_io_readw(QPCIDevice *dev, void *data);
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uint32_t qpci_io_readl(QPCIDevice *dev, void *data);
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void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value);
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void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value);
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void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value);
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void *qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr);
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void qpci_iounmap(QPCIDevice *dev, void *data);
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#endif
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