OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity
qemu-e2k/target/mips/tcg
History
Richard Henderson ef00cd4a22 target/mips: Fix single stepping 
As per an ancient comment in mips_tr_translate_insn about the
expectations of gdb, when restarting the insn in a delay slot
we also re-execute the branch.  Which means that we are
expected to execute two insns in this case.

This has been broken since 8b86d6d258, where we forced max_insns
to 1 while single-stepping.  This resulted in an exit from the
translator loop after the branch but before the delay slot is
translated.

Increase the max_insns to 2 for this case.  In addition, bypass
the end-of-page check, for when the branch itself ends the page.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 		2021-10-15 16:39:14 -07:00
..
sysemu target/mips: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
user target/mips: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
dsp_helper.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
exception.c target/mips: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
fpu_helper.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
ldst_helper.c target/mips: Replace GET_LMASK64() macro by get_lmask(64) function 2021-08-25 13:02:14 +02:00
lmmi_helper.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
meson.build target/mips: Introduce decodetree structure for NEC Vr54xx extension 2021-08-25 13:02:14 +02:00
micromips_translate.c.inc accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
mips16e_translate.c.inc accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
msa.decode target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
msa_helper.c target/mips: Use 8-byte memory ops for msa load/store 2021-10-13 08:42:49 -07:00
msa_helper.h.inc target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
msa_translate.c target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
mxu_translate.c target/mips: Fix gen_mxu_s32ldd_s32lddr 2021-06-29 10:04:57 -07:00
nanomips_translate.c.inc accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
op_helper.c target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c 2021-08-25 13:02:14 +02:00
rel6.decode target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
rel6_translate.c target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
sysemu_helper.h.inc target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c 2021-05-02 16:49:35 +02:00
tcg-internal.h hw/core: Make do_unaligned_access noreturn 2021-09-21 19:36:44 -07:00
trace-events target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
trace.h target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
translate.c target/mips: Fix single stepping 2021-10-15 16:39:14 -07:00
translate.h target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian() 2021-08-25 13:02:14 +02:00
translate_addr_const.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
tx79.decode target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
tx79_translate.c target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
txx9_translate.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
vr54xx.decode target/mips: Convert Vr54xx MSA* opcodes to decodetree 2021-08-25 13:02:14 +02:00
vr54xx_helper.c target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c 2021-08-25 13:02:14 +02:00
vr54xx_helper.h.inc target/mips: Extract NEC Vr54xx helper definitions 2021-08-25 13:02:14 +02:00
vr54xx_translate.c target/mips: Convert Vr54xx MSA* opcodes to decodetree 2021-08-25 13:02:14 +02:00