qemu-e2k/hw/misc
Daniel Henrique Barboza ef80a708b5 ivshmem.c: change endianness to LITTLE_ENDIAN
The ivshmem device, as with most PCI devices, uses little endian byte
order. However, the endianness of its mmio_ops is marked as
DEVICE_NATIVE_ENDIAN. This presents not only the usual problems with big
endian hosts but also with PowerPC little endian hosts as well, since
the Power architecture in QEMU uses big endian hardware (XIVE controller,
PCI Host Bridges, etc) even if the host is in little endian byte order.

As it is today, the IVPosition of the device will be byte swapped when
running in Power BE and LE. This can be seen by changing the existing
qtest 'ivshmem-test' to run in ppc64 hosts and printing the IVPOSITION
regs in test_ivshmem_server() right after the VM ids assert. For x86_64
the VM id values read are '0' and '1', for ppc64 (tested in a Power8
RHEL 7.9 BE server) and ppc64le (tested in a Power9 RHEL 8.6 LE server)
the ids will be '0' and '0x1000000'.

Change this device to LITTLE_ENDIAN fixes the issue for Power hosts of
both endianness, and every other big-endian architecture that might use
this device, without impacting x86 users.

Fixes: cb06608e17 ("ivshmem: convert to memory API")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/168
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211124092948.335389-2-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:13 +01:00
..
macio pmu: fix pmu vmstate subsection list 2021-11-17 19:10:44 +01:00
a9scu.c
allwinner-cpucfg.c
allwinner-h3-ccu.c
allwinner-h3-dramc.c
allwinner-h3-sysctrl.c
allwinner-sid.c
applesmc.c Revert "hw/misc: applesmc: use host osk as default on macs" 2021-10-13 10:47:50 +02:00
arm11scu.c
arm_integrator_debug.c
arm_l2x0.c
arm_sysctl.c
armsse-cpu-pwrctrl.c
armsse-cpuid.c
armsse-mhu.c
armv7m_ras.c arm: Move M-profile RAS register block into its own device 2021-09-01 11:08:18 +01:00
aspeed_hace.c
aspeed_lpc.c
aspeed_scu.c hw/arm/aspeed: Initialize AST2600 UART clock selection registers 2021-09-20 08:50:59 +02:00
aspeed_sdmc.c
aspeed_xdma.c
auxbus.c qbus: Rename qbus_create() to qbus_new() 2021-09-30 13:44:08 +01:00
avr_power.c
bcm2835_cprman.c
bcm2835_mbox.c
bcm2835_mphi.c
bcm2835_powermgt.c hw/arm: Add basic power management to raspi. 2021-07-02 11:48:36 +01:00
bcm2835_property.c
bcm2835_rng.c
bcm2835_thermal.c
cbus.c
debugexit.c
eccmemctl.c
edu.c
empty_slot.c
exynos4210_clk.c
exynos4210_pmu.c
exynos4210_rng.c
grlib_ahb_apb_pnp.c
imx6_ccm.c
imx6_src.c
imx6ul_ccm.c
imx7_ccm.c
imx7_gpr.c
imx7_snvs.c
imx25_ccm.c
imx31_ccm.c
imx_ccm.c
imx_rngc.c
iotkit-secctl.c
iotkit-sysctl.c
iotkit-sysinfo.c
ivshmem.c ivshmem.c: change endianness to LITTLE_ENDIAN 2021-12-17 17:57:13 +01:00
Kconfig sensor: Move hardware sensors from misc to a sensor directory 2021-06-17 07:10:32 -05:00
led.c
mac_via.c mac_via: add GPIO for A/UX mode 2021-10-20 16:18:40 +02:00
mchp_pfsoc_dmc.c
mchp_pfsoc_ioscb.c
mchp_pfsoc_sysreg.c
meson.build arm: Move M-profile RAS register block into its own device 2021-09-01 11:08:18 +01:00
mips_cmgcr.c
mips_cpc.c
mips_itu.c
mos6522.c
mps2-fpgaio.c
mps2-scc.c
msf2-sysreg.c
mst_fpga.c
npcm7xx_clk.c
npcm7xx_gcr.c
npcm7xx_mft.c
npcm7xx_pwm.c
npcm7xx_rng.c
nrf51_rng.c
omap_clk.c
omap_gpmc.c
omap_l4.c
omap_sdrc.c
omap_tap.c
pc-testdev.c
pca9552.c misc/pca9552: Fix LED status register indexing in pca955x_get_led() 2021-09-20 08:50:59 +02:00
pci-testdev.c
pvpanic-isa.c
pvpanic-pci.c
pvpanic.c
sbsa_ec.c
sga.c hw/misc: deprecate the 'sga' device 2021-11-02 17:24:18 +01:00
sifive_e_prci.c
sifive_test.c
sifive_u_otp.c hw/misc/sifive_u_otp: Do not reset OTP content on hardware reset 2021-11-22 10:46:22 +10:00
sifive_u_prci.c
slavio_misc.c
stm32f2xx_syscfg.c
stm32f4xx_exti.c
stm32f4xx_syscfg.c
trace-events mac_via: add GPIO for A/UX mode 2021-10-20 16:18:40 +02:00
trace.h
tz-mpc.c
tz-msc.c
tz-ppc.c
unimp.c
virt_ctrl.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
vmcoreinfo.c
xlnx-versal-xramc.c
zynq_slcr.c hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase 2021-09-13 16:07:20 +01:00