QEMU With E2K User Support
Go to file
Peter Maydell f00f57f344 This PR includes multiple fixes and features for RISC-V:
- Fixes a bug in printing trap causes
  - Allows 16-bit writes to the SiFive test device. This fixes the
    failure to reboot the RISC-V virt machine
  - Support for the Microchip PolarFire SoC and Icicle Kit
  - A reafactor of RISC-V code out of hw/riscv
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAl9aa4YACgkQIeENKd+X
 cFTJjgf5ASfFIO5HqP1l80/UM5Pswyq0IROZDq0ItZa6U4EPzLXoE2N0POriIj4h
 Ds2JbMg0ORDqY0VbSxHlgYHMgJ9S6cuVOMnATsPG0d2jaJ3gSxLBu5k/1ENqe+Vw
 sSYXZv5uEAUfOFz99zbuhKHct5HzlmBFW9dVHdflUQS+cRgsSXq27mz1BvZ8xMWl
 lMhwubqdoNx0rOD3vKnlwrxaf54DcJ2IQT3BtTCjEar3tukdNaLijAuwt2hrFyr+
 IwpeFXA/NWar+mXP3M+BvcLaI33j73/ac2+S5SJuzHGp/ot5nT5gAuq3PDEjHMeS
 t6z9Exp776VXxNE2iUA5NB65Yp3/6w==
 =07oA
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging

This PR includes multiple fixes and features for RISC-V:
 - Fixes a bug in printing trap causes
 - Allows 16-bit writes to the SiFive test device. This fixes the
   failure to reboot the RISC-V virt machine
 - Support for the Microchip PolarFire SoC and Icicle Kit
 - A reafactor of RISC-V code out of hw/riscv

# gpg: Signature made Thu 10 Sep 2020 19:08:06 BST
# gpg:                using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8  CE8F 21E1 0D29 DF97 7054

* remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits)
  hw/riscv: Sort the Kconfig options in alphabetical order
  hw/riscv: Drop CONFIG_SIFIVE
  hw/riscv: Always build riscv_hart.c
  hw/riscv: Move sifive_test model to hw/misc
  hw/riscv: Move sifive_uart model to hw/char
  hw/riscv: Move riscv_htif model to hw/char
  hw/riscv: Move sifive_plic model to hw/intc
  hw/riscv: Move sifive_clint model to hw/intc
  hw/riscv: Move sifive_gpio model to hw/gpio
  hw/riscv: Move sifive_u_otp model to hw/misc
  hw/riscv: Move sifive_u_prci model to hw/misc
  hw/riscv: Move sifive_e_prci model to hw/misc
  hw/riscv: sifive_u: Connect a DMA controller
  hw/riscv: clint: Avoid using hard-coded timebase frequency
  hw/riscv: microchip_pfsoc: Hook GPIO controllers
  hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
  hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
  hw/net: cadence_gem: Add a new 'phy-addr' property
  hw/riscv: microchip_pfsoc: Connect a DMA controller
  hw/dma: Add SiFive platform DMA controller emulation
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	hw/riscv/trace-events
2020-09-13 20:29:35 +01:00
.github
.gitlab-ci.d gitlab-ci: Add cross-compiling build tests 2020-09-07 12:34:17 +02:00
accel Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
audio trace-events: Delete unused trace points 2020-09-09 17:17:02 +01:00
authz
backends Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-09 09:27:11 -04:00
block Block layer patches: 2020-09-11 14:47:49 +01:00
bsd-user
capstone@22ead3e0bf
chardev Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
contrib plugins: move the more involved plugins to contrib 2020-09-10 10:47:03 +01:00
crypto crypto/gcrypt: Split QCryptoCipherGcrypt into subclasses 2020-09-10 11:02:23 +01:00
default-configs hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board 2020-09-09 15:54:18 -07:00
disas configure: move disassembler configuration to meson 2020-09-08 11:43:16 +02:00
docs plugins: move the more involved plugins to contrib 2020-09-10 10:47:03 +01:00
dtc@85e5d83984
dump
fpu softfloat: Define misc operations for bfloat16 2020-08-28 10:48:07 -07:00
fsdev
gdb-xml
hw This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
include This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
io
libdecnumber
linux-headers
linux-user linux-user: Protect btrfs ioctl target definitions 2020-09-06 12:29:19 +02:00
meson@68ed748f84 meson: bump submodule to 0.55.1 2020-09-01 01:51:51 -04:00
migration QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
monitor configure: do not include dependency flags in QEMU_CFLAGS and LIBS 2020-09-08 11:43:16 +02:00
nbd nbd: Use CAF when looking for dirty bitmap 2020-09-07 12:31:31 +02:00
net trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
pc-bios ipxe: update to aug 2020 snapshot. 2020-09-08 21:21:13 +01:00
plugins
po
python/qemu
qapi Block layer patches: 2020-09-11 14:47:49 +01:00
qga meson: install $localstatedir/run for qga 2020-09-01 01:51:52 -04:00
qobject
qom qom: make object_ref/unref use a void * instead of Object *. 2020-09-08 17:29:18 -04:00
replay
roms ipxe: update to aug 2020 snapshot. 2020-09-08 21:21:13 +01:00
scripts QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
scsi Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
slirp@ce94eba204
softmmu softmmu: Add missing trace-events file 2020-09-09 17:15:18 +01:00
storage-daemon
stubs stubs: Move qemu_fd_register stub to util/main-loop.c 2020-09-07 12:34:17 +02:00
target This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
tcg tcg: Implement 256-bit dup for tcg_gen_gvec_dup_mem 2020-09-03 13:13:58 -07:00
tests Various misc and testing fixes: 2020-09-12 22:54:32 +01:00
tools meson: use meson datadir instead of qemu_datadir 2020-09-01 08:51:33 -04:00
trace meson: use meson datadir instead of qemu_datadir 2020-09-01 08:51:33 -04:00
ui QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
util trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
.cirrus.yml cirrus.yml: Split FreeBSD job into two parts 2020-09-03 12:46:56 +02:00
.dir-locals.el
.editorconfig
.exrc
.gdbinit
.gitignore configure: move disassembler configuration to meson 2020-09-08 11:43:16 +02:00
.gitlab-ci.yml gitlab: expand test coverage for crypto builds 2020-09-07 12:34:17 +02:00
.gitmodules
.gitpublish
.mailmap mailmap: Add entry for Greg Kurz 2020-09-01 11:13:02 +02:00
.patchew.yml
.readthedocs.yml
.shippable.yml
.travis.yml tests/meson.build: fp tests don't need CONFIG_TCG 2020-09-10 10:43:57 +01:00
block.c block: Leave BDS.backing_{file,format} constant 2020-09-07 12:31:31 +02:00
blockdev-nbd.c
blockdev.c blockdev: Fix active commit choice 2020-09-07 12:31:31 +02:00
blockjob.c
bootdevice.c
Changelog
CODING_STYLE.rst CODING_STYLE.rst: flesh out our naming conventions. 2020-09-10 10:34:58 +01:00
configure plugins: move the more involved plugins to contrib 2020-09-10 10:47:03 +01:00
COPYING
COPYING.LIB
cpus-common.c
device_tree.c
disas.c
dma-helpers.c
exec-vary.c
exec.c target/arm: Move start-powered-off property to generic CPUState 2020-09-08 10:08:42 +10:00
gdbstub.c
gitdm.config
hmp-commands-info.hx
hmp-commands.hx
iothread.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
job-qmp.c
job.c
Kconfig
Kconfig.host kconfig: fix comment referring to old Makefiles 2020-09-10 16:20:49 +02:00
LICENSE
MAINTAINERS This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
Makefile Various misc and testing fixes: 2020-09-12 22:54:32 +01:00
memory_ldst.c.inc
meson_options.txt meson: add description to options 2020-09-01 08:51:44 -04:00
meson.build This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
module-common.c
os-posix.c
os-win32.c
qdev-monitor.c
qemu-bridge-helper.c
qemu-edid.c
qemu-img-cmds.hx
qemu-img.c qemu-img: Use child access functions 2020-09-07 12:31:31 +02:00
qemu-io-cmds.c
qemu-io.c block: add missing socket_init() calls to tools 2020-09-02 16:47:39 -05:00
qemu-keymap.c
qemu-nbd.c nbd: disable signals and forking on Windows builds 2020-09-02 16:48:21 -05:00
qemu-options-wrapper.h
qemu-options.h
qemu-options.hx qemu-options.hx: Fix typo for netdev documentation 2020-09-01 09:17:58 +02:00
qemu-seccomp.c
qemu.nsi
qemu.sasl
README.rst
replication.c
replication.h
thunk.c
tpm.c
trace-events trace-events: Fix attribution of trace points to source 2020-09-09 17:17:58 +01:00
VERSION
version.rc
version.texi.in

===========
QEMU README
===========

QEMU is a generic and open source machine & userspace emulator and
virtualizer.

QEMU is capable of emulating a complete machine in software without any
need for hardware virtualization support. By using dynamic translation,
it achieves very good performance. QEMU can also integrate with the Xen
and KVM hypervisors to provide emulated hardware while allowing the
hypervisor to manage the CPU. With hypervisor support, QEMU can achieve
near native performance for CPUs. When QEMU emulates CPUs directly it is
capable of running operating systems made for one machine (e.g. an ARMv7
board) on a different machine (e.g. an x86_64 PC board).

QEMU is also capable of providing userspace API virtualization for Linux
and BSD kernel interfaces. This allows binaries compiled against one
architecture ABI (e.g. the Linux PPC64 ABI) to be run on a host using a
different architecture ABI (e.g. the Linux x86_64 ABI). This does not
involve any hardware emulation, simply CPU and syscall emulation.

QEMU aims to fit into a variety of use cases. It can be invoked directly
by users wishing to have full control over its behaviour and settings.
It also aims to facilitate integration into higher level management
layers, by providing a stable command line interface and monitor API.
It is commonly invoked indirectly via the libvirt library when using
open source applications such as oVirt, OpenStack and virt-manager.

QEMU as a whole is released under the GNU General Public License,
version 2. For full licensing details, consult the LICENSE file.


Building
========

QEMU is multi-platform software intended to be buildable on all modern
Linux platforms, OS-X, Win32 (via the Mingw64 toolchain) and a variety
of other UNIX targets. The simple steps to build QEMU are:


.. code-block:: shell

  mkdir build
  cd build
  ../configure
  make

Additional information can also be found online via the QEMU website:

* `<https://qemu.org/Hosts/Linux>`_
* `<https://qemu.org/Hosts/Mac>`_
* `<https://qemu.org/Hosts/W32>`_


Submitting patches
==================

The QEMU source code is maintained under the GIT version control system.

.. code-block:: shell

   git clone https://git.qemu.org/git/qemu.git

When submitting patches, one common approach is to use 'git
format-patch' and/or 'git send-email' to format & send the mail to the
qemu-devel@nongnu.org mailing list. All patches submitted must contain
a 'Signed-off-by' line from the author. Patches should follow the
guidelines set out in the CODING_STYLE.rst file.

Additional information on submitting patches can be found online via
the QEMU website

* `<https://qemu.org/Contribute/SubmitAPatch>`_
* `<https://qemu.org/Contribute/TrivialPatches>`_

The QEMU website is also maintained under source control.

.. code-block:: shell

  git clone https://git.qemu.org/git/qemu-web.git

* `<https://www.qemu.org/2017/02/04/the-new-qemu-website-is-up/>`_

A 'git-publish' utility was created to make above process less
cumbersome, and is highly recommended for making regular contributions,
or even just for sending consecutive patch series revisions. It also
requires a working 'git send-email' setup, and by default doesn't
automate everything, so you may want to go through the above steps
manually for once.

For installation instructions, please go to

*  `<https://github.com/stefanha/git-publish>`_

The workflow with 'git-publish' is:

.. code-block:: shell

  $ git checkout master -b my-feature
  $ # work on new commits, add your 'Signed-off-by' lines to each
  $ git publish

Your patch series will be sent and tagged as my-feature-v1 if you need to refer
back to it in the future.

Sending v2:

.. code-block:: shell

  $ git checkout my-feature # same topic branch
  $ # making changes to the commits (using 'git rebase', for example)
  $ git publish

Your patch series will be sent with 'v2' tag in the subject and the git tip
will be tagged as my-feature-v2.

Bug reporting
=============

The QEMU project uses Launchpad as its primary upstream bug tracker. Bugs
found when running code built from QEMU git or upstream released sources
should be reported via:

* `<https://bugs.launchpad.net/qemu/>`_

If using QEMU via an operating system vendor pre-built binary package, it
is preferable to report bugs to the vendor's own bug tracker first. If
the bug is also known to affect latest upstream code, it can also be
reported via launchpad.

For additional information on bug reporting consult:

* `<https://qemu.org/Contribute/ReportABug>`_


Contact
=======

The QEMU community can be contacted in a number of ways, with the two
main methods being email and IRC

* `<mailto:qemu-devel@nongnu.org>`_
* `<https://lists.nongnu.org/mailman/listinfo/qemu-devel>`_
* #qemu on irc.oftc.net

Information on additional methods of contacting the community can be
found online via the QEMU website:

* `<https://qemu.org/Contribute/StartHere>`_