qemu-e2k/tests/tcg/mips/mips32-dsp/shilov.c
Petar Jovanovic 19e6c50d2d target-mips: Fix incorrect shift for SHILO and SHILOV
helper_shilo has not been shifting an accumulator value correctly for negative
values in 'shift' field. Minor optimization for shift=0 case.
This change also adds tests that will trigger issue and check for regressions.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-12-06 08:12:14 +01:00

50 lines
879 B
C

#include<stdio.h>
#include<assert.h>
int main()
{
int rs, ach, acl;
int resulth, resultl;
rs = 0x0F;
ach = 0xBBAACCFF;
acl = 0x1C3B001D;
resulth = 0x17755;
resultl = 0x99fe3876;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"shilov $ac1, %2\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
: "+r"(ach), "+r"(acl)
: "r"(rs)
);
assert(ach == resulth);
assert(acl == resultl);
rs = 0xffffffff;
ach = 0x1;
acl = 0x80000000;
resulth = 0x3;
resultl = 0x0;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"shilov $ac1, %2\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
: "+r"(ach), "+r"(acl)
: "r"(rs)
);
assert(ach == resulth);
assert(acl == resultl);
return 0;
}