Richard Henderson f33960df5b target/riscv: Tidy trans_rvh.c.inc ... Exit early if check_access fails. Split out do_hlv, do_hsv, do_hlvx subroutines. Use dest_gpr, get_gpr in the new subroutines. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210823195529.560295-24-richard.henderson@linaro.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2021-09-01 11:59:12 +10:00
..
insn_trans	target/riscv: Tidy trans_rvh.c.inc	2021-09-01 11:59:12 +10:00
arch_dump.c
bitmanip_helper.c	target/riscv: rvb: generalized or-combine	2021-06-08 09:59:45 +10:00
cpu_bits.h
cpu_helper.c
cpu_user.h
cpu-param.h
cpu.c	target/riscv: Don't wrongly override isa version	2021-09-01 11:59:12 +10:00
cpu.h	target/riscv: rvb: add b-ext version cpu option	2021-06-08 09:59:46 +10:00
csr.c	target/riscv: Fix hgeie, hgeip	2021-09-01 11:59:12 +10:00
fpu_helper.c
gdbstub.c	target/riscv: gdbstub: Fix dynamic CSR XML generation	2021-06-24 05:00:12 -07:00
helper.h	target/riscv: Reorg csr instructions	2021-09-01 11:59:12 +10:00
insn16.decode
insn32.decode	target/riscv: Tidy trans_rvh.c.inc	2021-09-01 11:59:12 +10:00
instmap.h
internals.h
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
machine.c
meson.build	target/riscv: rvb: generalized reverse	2021-06-08 09:59:45 +10:00
monitor.c
op_helper.c	target/riscv: Reorg csr instructions	2021-09-01 11:59:12 +10:00
pmp.c	target/riscv: pmp: Fix some typos	2021-07-15 08:56:00 +10:00
pmp.h
trace-events
trace.h
translate.c	target/riscv: Use DisasExtend in shift operations	2021-09-01 11:59:12 +10:00
vector_helper.c