Peter Crosthwaite 7729e1f4b3 arm: xlnx-zynqmp: Add GIC ... Add the GIC and connect IRQ outputs to the CPUs. The GIC regions are under-decoded through a 64k address region so implement aliases accordingly. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 5853189965728d676106d9e94e76b9bb87981cb5.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2015-05-18 16:41:09 +01:00
..
allwinner-a10.h	hw/arm/allwinner-a10: initialize EMAC	2014-02-08 14:50:48 +00:00
arm.h	target_arm: Parameterise the irq lines for armv7m_init	2015-02-05 13:37:21 +00:00
digic.h	hw/arm/digic: add UART support	2013-12-17 20:12:51 +00:00
exynos4210.h	i2c: Rename i2c_bus to I2CBus	2014-02-14 16:22:31 +01:00
imx.h	…
omap.h	hw: Convert from BlockDriverState to BlockBackend, mostly	2014-10-20 14:02:25 +02:00
primecell.h	…
pxa.h	hw: Convert from BlockDriverState to BlockBackend, mostly	2014-10-20 14:02:25 +02:00
sharpsl.h	…
soc_dma.h	…
stm32f205_soc.h	stm32f205: Fix SoC type name	2015-04-13 11:37:10 +01:00
xlnx-zynqmp.h	arm: xlnx-zynqmp: Add GIC	2015-05-18 16:41:09 +01:00