b1aeb92666
pcie aer needs SERR bit to be writable, and the PCI spec requires this as well. For compatibility, introduce compat global property command_serr_enable and make this bit readonly for a pre 0.14 pc machine. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
393 lines
12 KiB
C
393 lines
12 KiB
C
/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "pc.h"
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#include "apic.h"
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#include "pci.h"
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#include "usb-uhci.h"
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#include "usb-ohci.h"
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#include "net.h"
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#include "boards.h"
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#include "ide.h"
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#include "kvm.h"
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#include "sysemu.h"
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#include "sysbus.h"
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#include "blockdev.h"
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#define MAX_IDE_BUS 2
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static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
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static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
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static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
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static void ioapic_init(IsaIrqState *isa_irq_state)
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{
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DeviceState *dev;
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SysBusDevice *d;
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unsigned int i;
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dev = qdev_create(NULL, "ioapic");
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qdev_init_nofail(dev);
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d = sysbus_from_qdev(dev);
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sysbus_mmio_map(d, 0, 0xfec00000);
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for (i = 0; i < IOAPIC_NUM_PINS; i++) {
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isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
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}
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}
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/* PC hardware initialisation */
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static void pc_init1(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model,
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int pci_enabled)
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{
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int i;
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ram_addr_t below_4g_mem_size, above_4g_mem_size;
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PCIBus *pci_bus;
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PCII440FXState *i440fx_state;
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int piix3_devfn = -1;
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qemu_irq *cpu_irq;
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qemu_irq *isa_irq;
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qemu_irq *i8259;
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qemu_irq *cmos_s3;
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qemu_irq *smi_irq;
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IsaIrqState *isa_irq_state;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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FDCtrl *floppy_controller;
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BusState *idebus[MAX_IDE_BUS];
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ISADevice *rtc_state;
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pc_cpus_init(cpu_model);
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vmport_init();
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/* allocate ram and load rom/bios */
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pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
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&below_4g_mem_size, &above_4g_mem_size);
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cpu_irq = pc_allocate_cpu_irq();
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i8259 = i8259_init(cpu_irq[0]);
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isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
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isa_irq_state->i8259 = i8259;
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if (pci_enabled) {
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ioapic_init(isa_irq_state);
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}
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isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
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if (pci_enabled) {
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pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
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} else {
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pci_bus = NULL;
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i440fx_state = NULL;
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isa_bus_new(NULL);
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}
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isa_bus_irqs(isa_irq);
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pc_register_ferr_irq(isa_reserve_irq(13));
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pc_vga_init(pci_enabled? pci_bus: NULL);
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/* init basic PC hardware */
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pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
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for(i = 0; i < nb_nics; i++) {
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NICInfo *nd = &nd_table[i];
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if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
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pc_init_ne2k_isa(nd);
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else
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pci_nic_init_nofail(nd, "e1000", NULL);
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}
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if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
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fprintf(stderr, "qemu: too many IDE bus\n");
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exit(1);
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}
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for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
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hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
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}
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if (pci_enabled) {
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PCIDevice *dev;
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dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
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idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
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idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
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} else {
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for(i = 0; i < MAX_IDE_BUS; i++) {
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ISADevice *dev;
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dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
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hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
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idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
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}
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}
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pc_audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
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pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
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idebus[0], idebus[1], floppy_controller, rtc_state);
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if (pci_enabled && usb_enabled) {
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usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
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}
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if (pci_enabled && acpi_enabled) {
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uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
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i2c_bus *smbus;
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cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
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smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
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/* TODO: Populate SPD eeprom data. */
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smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
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isa_reserve_irq(9), *cmos_s3, *smi_irq,
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kvm_enabled());
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for (i = 0; i < 8; i++) {
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DeviceState *eeprom;
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eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
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qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
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qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
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qdev_init_nofail(eeprom);
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}
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}
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if (i440fx_state) {
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i440fx_init_memory_mappings(i440fx_state);
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}
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if (pci_enabled) {
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pc_pci_device_init(pci_bus);
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}
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}
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static void pc_init_pci(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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pc_init1(ram_size, boot_device,
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kernel_filename, kernel_cmdline,
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initrd_filename, cpu_model, 1);
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}
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static void pc_init_isa(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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if (cpu_model == NULL)
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cpu_model = "486";
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pc_init1(ram_size, boot_device,
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kernel_filename, kernel_cmdline,
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initrd_filename, cpu_model, 0);
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}
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static QEMUMachine pc_machine = {
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.name = "pc-0.14",
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.alias = "pc",
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.desc = "Standard PC",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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{
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.driver = "PCI",
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.property = "command_serr_enable",
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.value = "off",
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},
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{ /* end of list */ }
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},
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.is_default = 1,
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};
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static QEMUMachine pc_machine_v0_13 = {
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.name = "pc-0.13",
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.desc = "Standard PC",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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{
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.driver = "virtio-9p-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "VGA",
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.property = "rombar",
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.value = stringify(0),
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},{
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.driver = "vmware-svga",
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.property = "rombar",
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.value = stringify(0),
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},
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{ /* end of list */ }
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},
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};
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static QEMUMachine pc_machine_v0_12 = {
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.name = "pc-0.12",
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.desc = "Standard PC",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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{
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.driver = "virtio-serial-pci",
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.property = "max_ports",
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.value = stringify(1),
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},{
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.driver = "virtio-serial-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "VGA",
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.property = "rombar",
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.value = stringify(0),
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},{
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.driver = "vmware-svga",
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.property = "rombar",
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.value = stringify(0),
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},{
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.driver = "PCI",
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.property = "command_serr_enable",
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.value = "off",
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},
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{ /* end of list */ }
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}
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};
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static QEMUMachine pc_machine_v0_11 = {
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.name = "pc-0.11",
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.desc = "Standard PC, qemu 0.11",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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{
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.driver = "virtio-blk-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "virtio-serial-pci",
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.property = "max_ports",
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.value = stringify(1),
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},{
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.driver = "virtio-serial-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "ide-drive",
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.property = "ver",
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.value = "0.11",
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},{
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.driver = "scsi-disk",
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.property = "ver",
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.value = "0.11",
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},{
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.driver = "PCI",
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.property = "rombar",
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.value = stringify(0),
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},{
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.driver = "PCI",
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.property = "command_serr_enable",
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.value = "off",
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},
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{ /* end of list */ }
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}
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};
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static QEMUMachine pc_machine_v0_10 = {
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.name = "pc-0.10",
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.desc = "Standard PC, qemu 0.10",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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{
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.driver = "virtio-blk-pci",
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.property = "class",
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.value = stringify(PCI_CLASS_STORAGE_OTHER),
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},{
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.driver = "virtio-serial-pci",
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.property = "class",
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.value = stringify(PCI_CLASS_DISPLAY_OTHER),
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},{
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.driver = "virtio-serial-pci",
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.property = "max_ports",
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.value = stringify(1),
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},{
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.driver = "virtio-serial-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "virtio-net-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "virtio-blk-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "ide-drive",
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.property = "ver",
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.value = "0.10",
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},{
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.driver = "scsi-disk",
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.property = "ver",
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.value = "0.10",
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},{
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.driver = "PCI",
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.property = "rombar",
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.value = stringify(0),
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},{
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.driver = "PCI",
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.property = "command_serr_enable",
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.value = "off",
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},
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{ /* end of list */ }
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},
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};
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static QEMUMachine isapc_machine = {
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.name = "isapc",
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.desc = "ISA-only PC",
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.init = pc_init_isa,
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.max_cpus = 1,
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};
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static void pc_machine_init(void)
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{
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qemu_register_machine(&pc_machine);
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qemu_register_machine(&pc_machine_v0_13);
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qemu_register_machine(&pc_machine_v0_12);
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qemu_register_machine(&pc_machine_v0_11);
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qemu_register_machine(&pc_machine_v0_10);
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qemu_register_machine(&isapc_machine);
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}
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machine_init(pc_machine_init);
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