a2458627f9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1523 c046a42c-6fe2-441c-8c8c-71466251a162
430 lines
17 KiB
C
430 lines
17 KiB
C
/* Interface between the opcode library and its callers.
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Written by Cygnus Support, 1993.
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The opcode library (libopcodes.a) provides instruction decoders for
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a large variety of instruction sets, callable with an identical
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interface, for making instruction-processing programs more independent
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of the instruction set being processed. */
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#ifndef DIS_ASM_H
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#define DIS_ASM_H
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#define PARAMS(x) x
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typedef void *PTR;
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typedef uint64_t bfd_vma;
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typedef int64_t bfd_signed_vma;
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typedef uint8_t bfd_byte;
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#define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
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#define BFD64
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enum bfd_flavour {
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bfd_target_unknown_flavour,
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bfd_target_aout_flavour,
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bfd_target_coff_flavour,
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bfd_target_ecoff_flavour,
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bfd_target_elf_flavour,
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bfd_target_ieee_flavour,
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bfd_target_nlm_flavour,
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bfd_target_oasys_flavour,
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bfd_target_tekhex_flavour,
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bfd_target_srec_flavour,
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bfd_target_ihex_flavour,
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bfd_target_som_flavour,
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bfd_target_os9k_flavour,
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bfd_target_versados_flavour,
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bfd_target_msdos_flavour,
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bfd_target_evax_flavour
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};
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enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
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enum bfd_architecture
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{
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bfd_arch_unknown, /* File arch not known */
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bfd_arch_obscure, /* Arch known, not one of these */
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bfd_arch_m68k, /* Motorola 68xxx */
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#define bfd_mach_m68000 1
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#define bfd_mach_m68008 2
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#define bfd_mach_m68010 3
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#define bfd_mach_m68020 4
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#define bfd_mach_m68030 5
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#define bfd_mach_m68040 6
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#define bfd_mach_m68060 7
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bfd_arch_vax, /* DEC Vax */
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bfd_arch_i960, /* Intel 960 */
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/* The order of the following is important.
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lower number indicates a machine type that
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only accepts a subset of the instructions
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available to machines with higher numbers.
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The exception is the "ca", which is
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incompatible with all other machines except
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"core". */
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#define bfd_mach_i960_core 1
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#define bfd_mach_i960_ka_sa 2
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#define bfd_mach_i960_kb_sb 3
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#define bfd_mach_i960_mc 4
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#define bfd_mach_i960_xa 5
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#define bfd_mach_i960_ca 6
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#define bfd_mach_i960_jx 7
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#define bfd_mach_i960_hx 8
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bfd_arch_a29k, /* AMD 29000 */
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bfd_arch_sparc, /* SPARC */
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#define bfd_mach_sparc 1
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/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
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#define bfd_mach_sparc_sparclet 2
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#define bfd_mach_sparc_sparclite 3
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#define bfd_mach_sparc_v8plus 4
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#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
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#define bfd_mach_sparc_sparclite_le 6
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#define bfd_mach_sparc_v9 7
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#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
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#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
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#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
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/* Nonzero if MACH has the v9 instruction set. */
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#define bfd_mach_sparc_v9_p(mach) \
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((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
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&& (mach) != bfd_mach_sparc_sparclite_le)
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bfd_arch_mips, /* MIPS Rxxxx */
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#define bfd_mach_mips3000 3000
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#define bfd_mach_mips3900 3900
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#define bfd_mach_mips4000 4000
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#define bfd_mach_mips4010 4010
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#define bfd_mach_mips4100 4100
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#define bfd_mach_mips4300 4300
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#define bfd_mach_mips4400 4400
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#define bfd_mach_mips4600 4600
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#define bfd_mach_mips4650 4650
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#define bfd_mach_mips5000 5000
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#define bfd_mach_mips6000 6000
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#define bfd_mach_mips8000 8000
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#define bfd_mach_mips10000 10000
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#define bfd_mach_mips16 16
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bfd_arch_i386, /* Intel 386 */
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#define bfd_mach_i386_i386 0
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#define bfd_mach_i386_i8086 1
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#define bfd_mach_i386_i386_intel_syntax 2
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#define bfd_mach_x86_64 3
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#define bfd_mach_x86_64_intel_syntax 4
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bfd_arch_we32k, /* AT&T WE32xxx */
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bfd_arch_tahoe, /* CCI/Harris Tahoe */
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bfd_arch_i860, /* Intel 860 */
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bfd_arch_romp, /* IBM ROMP PC/RT */
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bfd_arch_alliant, /* Alliant */
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bfd_arch_convex, /* Convex */
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bfd_arch_m88k, /* Motorola 88xxx */
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bfd_arch_pyramid, /* Pyramid Technology */
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bfd_arch_h8300, /* Hitachi H8/300 */
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#define bfd_mach_h8300 1
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#define bfd_mach_h8300h 2
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#define bfd_mach_h8300s 3
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bfd_arch_powerpc, /* PowerPC */
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#define bfd_mach_ppc 0
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#define bfd_mach_ppc64 1
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#define bfd_mach_ppc_403 403
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#define bfd_mach_ppc_403gc 4030
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#define bfd_mach_ppc_505 505
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#define bfd_mach_ppc_601 601
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#define bfd_mach_ppc_602 602
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#define bfd_mach_ppc_603 603
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#define bfd_mach_ppc_ec603e 6031
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#define bfd_mach_ppc_604 604
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#define bfd_mach_ppc_620 620
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#define bfd_mach_ppc_630 630
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#define bfd_mach_ppc_750 750
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#define bfd_mach_ppc_860 860
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#define bfd_mach_ppc_a35 35
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#define bfd_mach_ppc_rs64ii 642
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#define bfd_mach_ppc_rs64iii 643
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#define bfd_mach_ppc_7400 7400
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bfd_arch_rs6000, /* IBM RS/6000 */
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bfd_arch_hppa, /* HP PA RISC */
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bfd_arch_d10v, /* Mitsubishi D10V */
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bfd_arch_z8k, /* Zilog Z8000 */
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#define bfd_mach_z8001 1
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#define bfd_mach_z8002 2
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bfd_arch_h8500, /* Hitachi H8/500 */
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bfd_arch_sh, /* Hitachi SH */
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#define bfd_mach_sh 0
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#define bfd_mach_sh3 0x30
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#define bfd_mach_sh3e 0x3e
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#define bfd_mach_sh4 0x40
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bfd_arch_alpha, /* Dec Alpha */
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bfd_arch_arm, /* Advanced Risc Machines ARM */
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#define bfd_mach_arm_2 1
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#define bfd_mach_arm_2a 2
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#define bfd_mach_arm_3 3
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#define bfd_mach_arm_3M 4
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#define bfd_mach_arm_4 5
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#define bfd_mach_arm_4T 6
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bfd_arch_ns32k, /* National Semiconductors ns32000 */
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bfd_arch_w65, /* WDC 65816 */
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bfd_arch_tic30, /* Texas Instruments TMS320C30 */
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bfd_arch_v850, /* NEC V850 */
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#define bfd_mach_v850 0
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bfd_arch_arc, /* Argonaut RISC Core */
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#define bfd_mach_arc_base 0
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bfd_arch_m32r, /* Mitsubishi M32R/D */
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#define bfd_mach_m32r 0 /* backwards compatibility */
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bfd_arch_mn10200, /* Matsushita MN10200 */
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bfd_arch_mn10300, /* Matsushita MN10300 */
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bfd_arch_last
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};
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typedef struct symbol_cache_entry
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{
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const char *name;
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union
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{
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PTR p;
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bfd_vma i;
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} udata;
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} asymbol;
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typedef int (*fprintf_ftype) PARAMS((FILE*, const char*, ...));
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enum dis_insn_type {
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dis_noninsn, /* Not a valid instruction */
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dis_nonbranch, /* Not a branch instruction */
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dis_branch, /* Unconditional branch */
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dis_condbranch, /* Conditional branch */
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dis_jsr, /* Jump to subroutine */
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dis_condjsr, /* Conditional jump to subroutine */
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dis_dref, /* Data reference instruction */
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dis_dref2 /* Two data references in instruction */
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};
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/* This struct is passed into the instruction decoding routine,
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and is passed back out into each callback. The various fields are used
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for conveying information from your main routine into your callbacks,
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for passing information into the instruction decoders (such as the
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addresses of the callback functions), or for passing information
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back from the instruction decoders to their callers.
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It must be initialized before it is first passed; this can be done
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by hand, or using one of the initialization macros below. */
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typedef struct disassemble_info {
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fprintf_ftype fprintf_func;
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FILE *stream;
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PTR application_data;
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/* Target description. We could replace this with a pointer to the bfd,
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but that would require one. There currently isn't any such requirement
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so to avoid introducing one we record these explicitly. */
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/* The bfd_flavour. This can be bfd_target_unknown_flavour. */
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enum bfd_flavour flavour;
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/* The bfd_arch value. */
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enum bfd_architecture arch;
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/* The bfd_mach value. */
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unsigned long mach;
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/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
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enum bfd_endian endian;
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/* An array of pointers to symbols either at the location being disassembled
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or at the start of the function being disassembled. The array is sorted
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so that the first symbol is intended to be the one used. The others are
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present for any misc. purposes. This is not set reliably, but if it is
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not NULL, it is correct. */
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asymbol **symbols;
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/* Number of symbols in array. */
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int num_symbols;
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/* For use by the disassembler.
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The top 16 bits are reserved for public use (and are documented here).
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The bottom 16 bits are for the internal use of the disassembler. */
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unsigned long flags;
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#define INSN_HAS_RELOC 0x80000000
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PTR private_data;
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/* Function used to get bytes to disassemble. MEMADDR is the
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address of the stuff to be disassembled, MYADDR is the address to
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put the bytes in, and LENGTH is the number of bytes to read.
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INFO is a pointer to this struct.
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Returns an errno value or 0 for success. */
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int (*read_memory_func)
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PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length,
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struct disassemble_info *info));
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/* Function which should be called if we get an error that we can't
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recover from. STATUS is the errno value from read_memory_func and
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MEMADDR is the address that we were trying to read. INFO is a
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pointer to this struct. */
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void (*memory_error_func)
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PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info));
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/* Function called to print ADDR. */
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void (*print_address_func)
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PARAMS ((bfd_vma addr, struct disassemble_info *info));
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/* Function called to determine if there is a symbol at the given ADDR.
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If there is, the function returns 1, otherwise it returns 0.
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This is used by ports which support an overlay manager where
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the overlay number is held in the top part of an address. In
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some circumstances we want to include the overlay number in the
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address, (normally because there is a symbol associated with
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that address), but sometimes we want to mask out the overlay bits. */
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int (* symbol_at_address_func)
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PARAMS ((bfd_vma addr, struct disassemble_info * info));
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/* These are for buffer_read_memory. */
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bfd_byte *buffer;
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bfd_vma buffer_vma;
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int buffer_length;
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/* This variable may be set by the instruction decoder. It suggests
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the number of bytes objdump should display on a single line. If
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the instruction decoder sets this, it should always set it to
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the same value in order to get reasonable looking output. */
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int bytes_per_line;
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/* the next two variables control the way objdump displays the raw data */
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/* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
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/* output will look like this:
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00: 00000000 00000000
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with the chunks displayed according to "display_endian". */
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int bytes_per_chunk;
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enum bfd_endian display_endian;
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/* Results from instruction decoders. Not all decoders yet support
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this information. This info is set each time an instruction is
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decoded, and is only valid for the last such instruction.
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To determine whether this decoder supports this information, set
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insn_info_valid to 0, decode an instruction, then check it. */
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char insn_info_valid; /* Branch info has been set. */
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char branch_delay_insns; /* How many sequential insn's will run before
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a branch takes effect. (0 = normal) */
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char data_size; /* Size of data reference in insn, in bytes */
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enum dis_insn_type insn_type; /* Type of instruction */
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bfd_vma target; /* Target address of branch or dref, if known;
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zero if unknown. */
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bfd_vma target2; /* Second target address for dref2 */
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/* Command line options specific to the target disassembler. */
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char * disassembler_options;
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} disassemble_info;
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/* Standard disassemblers. Disassemble one instruction at the given
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target address. Return number of bytes processed. */
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typedef int (*disassembler_ftype)
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PARAMS((bfd_vma, disassemble_info *));
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extern int print_insn_big_mips PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_little_mips PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_i386 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_m68k PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_z8001 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_z8002 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_h8300 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_h8300h PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_h8300s PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_h8500 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*));
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extern disassembler_ftype arc_get_disassembler PARAMS ((int, int));
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extern int print_insn_arm PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_sparc PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_big_a29k PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_little_a29k PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_i960 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_sh PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_shl PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_hppa PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_m32r PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_m88k PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_big_powerpc PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_little_powerpc PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_d10v PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*));
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extern int print_insn_ppc PARAMS ((bfd_vma, disassemble_info*));
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#if 0
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/* Fetch the disassembler for a given BFD, if that support is available. */
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extern disassembler_ftype disassembler PARAMS ((bfd *));
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#endif
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/* This block of definitions is for particular callers who read instructions
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into a buffer before calling the instruction decoder. */
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/* Here is a function which callers may wish to use for read_memory_func.
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It gets bytes from a buffer. */
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extern int buffer_read_memory
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PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
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/* This function goes with buffer_read_memory.
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It prints a message using info->fprintf_func and info->stream. */
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extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *));
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/* Just print the address in hex. This is included for completeness even
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though both GDB and objdump provide their own (to print symbolic
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addresses). */
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extern void generic_print_address
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PARAMS ((bfd_vma, struct disassemble_info *));
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/* Always true. */
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extern int generic_symbol_at_address
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PARAMS ((bfd_vma, struct disassemble_info *));
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/* Macro to initialize a disassemble_info struct. This should be called
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by all applications creating such a struct. */
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#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
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(INFO).flavour = bfd_target_unknown_flavour, \
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(INFO).arch = bfd_arch_unknown, \
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(INFO).mach = 0, \
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(INFO).endian = BFD_ENDIAN_UNKNOWN, \
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INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
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/* Call this macro to initialize only the internal variables for the
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disassembler. Architecture dependent things such as byte order, or machine
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variant are not touched by this macro. This makes things much easier for
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GDB which must initialize these things seperatly. */
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#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
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(INFO).fprintf_func = (FPRINTF_FUNC), \
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(INFO).stream = (STREAM), \
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(INFO).symbols = NULL, \
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(INFO).num_symbols = 0, \
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(INFO).buffer = NULL, \
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||
(INFO).buffer_vma = 0, \
|
||
(INFO).buffer_length = 0, \
|
||
(INFO).read_memory_func = buffer_read_memory, \
|
||
(INFO).memory_error_func = perror_memory, \
|
||
(INFO).print_address_func = generic_print_address, \
|
||
(INFO).symbol_at_address_func = generic_symbol_at_address, \
|
||
(INFO).flags = 0, \
|
||
(INFO).bytes_per_line = 0, \
|
||
(INFO).bytes_per_chunk = 0, \
|
||
(INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
|
||
(INFO).disassembler_options = NULL, \
|
||
(INFO).insn_info_valid = 0
|
||
|
||
#define _(x) x
|
||
|
||
/* from libbfd */
|
||
|
||
bfd_vma bfd_getl32 (const bfd_byte *addr);
|
||
bfd_vma bfd_getb32 (const bfd_byte *addr);
|
||
bfd_vma bfd_getl16 (const bfd_byte *addr);
|
||
bfd_vma bfd_getb16 (const bfd_byte *addr);
|
||
typedef enum bfd_boolean {false, true} boolean;
|
||
|
||
#endif /* ! defined (DIS_ASM_H) */
|