qemu-e2k/target-ppc
Benjamin Herrenschmidt f5d9c1089f ppc: Properly tag the translation cache based on MMU mode
We used to always flush the TLB when changing relocation mode in
MSR:IR and MSR:DR (ie. MMU on/off for Instructions and Data).

We don't anymore since we have split mmu_idx for instruction and data.

However, since we hard code the mmu_idx in the translated code, we
now need to also make sure MSR:IR and MSR:DR are part of the hflags
used to tag translated code, so that we use different translated
code for different MMU settings.

Darwin gets hurt by this problem.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-07 13:10:44 +10:00
..
arch_dump.c ppc: Clean up includes 2016-01-29 15:07:22 +00:00
cpu-models.c target-ppc: Add PVR for POWER8NVL processor 2016-03-16 09:55:05 +11:00
cpu-models.h target-ppc: Add PVR for POWER8NVL processor 2016-03-16 09:55:05 +11:00
cpu-qom.h target-ppc: make cpu-qom.h not target specific 2016-05-19 16:41:33 +02:00
cpu.h ppc: Better figure out if processor has HV mode 2016-06-07 10:17:45 +10:00
dfp_helper.c ppc: Clean up includes 2016-01-29 15:07:22 +00:00
excp_helper.c ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV 2016-06-07 10:17:45 +10:00
fpu_helper.c target-ppc/fpu_helper: Fix efscmp* instructions handling 2016-06-07 10:17:44 +10:00
gdbstub.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
helper_regs.h ppc: Properly tag the translation cache based on MMU mode 2016-06-07 13:10:44 +10:00
helper.h ppc: Do some batching of TCG tlb flushes 2016-05-30 13:20:04 +10:00
int_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
kvm_ppc.h spapr_iommu: Finish renaming vfio_accel to need_vfio 2016-05-27 09:40:23 +10:00
kvm-stub.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
kvm.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
machine.c ppc: Use split I/D mmu modes to avoid flushes on interrupts 2016-05-30 13:20:04 +10:00
Makefile.objs
mem_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
mfrom_table_gen.c ppc: Clean up includes 2016-01-29 15:07:22 +00:00
mfrom_table.c
misc_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
mmu_helper.c target-ppc: fixup bitrot in mmu_helper.c debug statements 2016-06-07 10:17:45 +10:00
mmu-hash32.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
mmu-hash32.h target-ppc: do not use target_ulong in cpu-qom.h 2016-05-19 13:08:05 +02:00
mmu-hash64.c ppc: Do some batching of TCG tlb flushes 2016-05-30 13:20:04 +10:00
mmu-hash64.h target-ppc: do not use target_ulong in cpu-qom.h 2016-05-19 13:08:05 +02:00
monitor.c ppc: Clean up includes 2016-01-29 15:07:22 +00:00
STATUS
timebase_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
translate_init.c ppc: Better figure out if processor has HV mode 2016-06-07 10:17:45 +10:00
translate.c ppc: fix hrfid, tlbia and slbia privilege 2016-06-07 10:17:45 +10:00
user_only_helper.c ppc: Clean up includes 2016-01-29 15:07:22 +00:00