a7f16aed39
The M2S-FG484 SOM uses a 16 MiB SPI flash (Spansion S25FL128SDPBHICO). Since the test asset is bigger, truncate it to the correct size to avoid when running the test_arm_emcraft_sf2 test: qemu-system-arm: device requires 16777216 bytes, block backend provides 67108864 bytes Add comment regarding the M2S-FG484 SOM hardware in hw/arm/msf2-som.c. Reported-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
115 lines
4.3 KiB
C
115 lines
4.3 KiB
C
/*
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* SmartFusion2 SOM starter kit(from Emcraft) emulation.
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*
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* M2S-FG484 SOM hardware architecture specification:
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* https://www.emcraft.com/jdownloads/som/m2s/m2s-som-ha.pdf
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*
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* Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "hw/boards.h"
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#include "hw/qdev-properties.h"
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#include "hw/arm/boot.h"
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#include "hw/qdev-clock.h"
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#include "exec/address-spaces.h"
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#include "hw/arm/msf2-soc.h"
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#define DDR_BASE_ADDRESS 0xA0000000
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#define DDR_SIZE (64 * MiB)
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#define M2S010_ENVM_SIZE (256 * KiB)
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#define M2S010_ESRAM_SIZE (64 * KiB)
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static void emcraft_sf2_s2s010_init(MachineState *machine)
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{
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DeviceState *dev;
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DeviceState *spi_flash;
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MSF2State *soc;
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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DriveInfo *dinfo = drive_get(IF_MTD, 0, 0);
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qemu_irq cs_line;
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BusState *spi_bus;
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MemoryRegion *sysmem = get_system_memory();
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MemoryRegion *ddr = g_new(MemoryRegion, 1);
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Clock *m3clk;
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if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
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error_report("This board can only be used with CPU %s",
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mc->default_cpu_type);
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exit(1);
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}
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memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
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&error_fatal);
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memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);
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dev = qdev_new(TYPE_MSF2_SOC);
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qdev_prop_set_string(dev, "part-name", "M2S010");
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qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type);
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qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE);
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qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE);
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/*
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* CPU clock and peripheral clocks(APB0, APB1)are configurable
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* in Libero. CPU clock is divided by APB0 and APB1 divisors for
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* peripherals. Emcraft's SoM kit comes with these settings by default.
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*/
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/* This clock doesn't need migration because it is fixed-frequency */
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m3clk = clock_new(OBJECT(machine), "m3clk");
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clock_set_hz(m3clk, 142 * 1000000);
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qdev_connect_clock_in(dev, "m3clk", m3clk);
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qdev_prop_set_uint32(dev, "apb0div", 2);
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qdev_prop_set_uint32(dev, "apb1div", 2);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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soc = MSF2_SOC(dev);
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/* Attach SPI flash to SPI0 controller */
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spi_bus = qdev_get_child_bus(dev, "spi0");
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spi_flash = qdev_new("s25sl12801"); /* Spansion S25FL128SDPBHICO */
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qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1);
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if (dinfo) {
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qdev_prop_set_drive_err(spi_flash, "drive",
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blk_by_legacy_dinfo(dinfo), &error_fatal);
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}
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qdev_realize_and_unref(spi_flash, spi_bus, &error_fatal);
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cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0);
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sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line);
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armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
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0, soc->envm_size);
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}
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static void emcraft_sf2_machine_init(MachineClass *mc)
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{
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mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)";
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mc->init = emcraft_sf2_s2s010_init;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
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}
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DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
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