4836b45510
The NSR register of the HV ring has a different, although similar, bit layout. TM_QW3_NSR_HE_PHYS bit should now be raised when the Hypervisor interrupt line is signaled. Other bits TM_QW3_NSR_HE_POOL and TM_QW3_NSR_HE_LSI are not modeled. LSI are for special interrupts reserved for HW bringup and the POOL bit is used when signaling a group of VPs. This is not currently implemented in Linux but it is in pHyp. The most important special commands on the HV TIMA page are added to let the core manage interrupts : acking and changing the CPU priority. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190306085032.15744-10-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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| .. | ||
| allwinner-a10-pic.c | ||
| apic_common.c | ||
| apic.c | ||
| arm_gic_common.c | ||
| arm_gic_kvm.c | ||
| arm_gic.c | ||
| arm_gicv2m.c | ||
| arm_gicv3_common.c | ||
| arm_gicv3_cpuif.c | ||
| arm_gicv3_dist.c | ||
| arm_gicv3_its_common.c | ||
| arm_gicv3_its_kvm.c | ||
| arm_gicv3_kvm.c | ||
| arm_gicv3_redist.c | ||
| arm_gicv3.c | ||
| armv7m_nvic.c | ||
| aspeed_vic.c | ||
| bcm2835_ic.c | ||
| bcm2836_control.c | ||
| etraxfs_pic.c | ||
| exynos4210_combiner.c | ||
| exynos4210_gic.c | ||
| gic_internal.h | ||
| gicv3_internal.h | ||
| grlib_irqmp.c | ||
| heathrow_pic.c | ||
| i8259_common.c | ||
| i8259.c | ||
| imx_avic.c | ||
| imx_gpcv2.c | ||
| intc.c | ||
| ioapic_common.c | ||
| ioapic.c | ||
| Kconfig | ||
| lm32_pic.c | ||
| Makefile.objs | ||
| mips_gic.c | ||
| nios2_iic.c | ||
| omap_intc.c | ||
| ompic.c | ||
| openpic_kvm.c | ||
| openpic.c | ||
| pl190.c | ||
| pnv_xive_regs.h | ||
| pnv_xive.c | ||
| puv3_intc.c | ||
| realview_gic.c | ||
| s390_flic_kvm.c | ||
| s390_flic.c | ||
| sh_intc.c | ||
| slavio_intctl.c | ||
| spapr_xive.c | ||
| trace-events | ||
| vgic_common.h | ||
| xics_kvm.c | ||
| xics_pnv.c | ||
| xics_spapr.c | ||
| xics.c | ||
| xilinx_intc.c | ||
| xive.c | ||
| xlnx-pmu-iomod-intc.c | ||
| xlnx-zynqmp-ipi.c | ||