qemu-e2k/target-arm
Peter Maydell f903fa22f4 target-arm: A64: provide functions for accessing FPCR and FPSR
The information which AArch32 holds in the FPSCR is split for
AArch64 into two logically distinct registers, FPSR and FPCR.
Since they are carefully arranged to use non-overlapping bits,
we leave the underlying state in the same place, and provide
accessor functions which just update the appropriate bits
via vfp_get_fpscr() and vfp_set_fpscr().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2013-12-17 19:42:31 +00:00
..
arm-semi.c
cpu64.c target-arm: A64: add set_pc cpu method 2013-12-17 19:42:31 +00:00
cpu-qom.h ARM: cpu: add "reset_hivecs" property 2013-12-17 19:42:29 +00:00
cpu.c target-arm: Clean up handling of AArch64 PSTATE 2013-12-17 19:42:30 +00:00
cpu.h target-arm: A64: provide functions for accessing FPCR and FPSR 2013-12-17 19:42:31 +00:00
crypto_helper.c
gdbstub64.c target-arm: Clean up handling of AArch64 PSTATE 2013-12-17 19:42:30 +00:00
gdbstub.c
helper.c target-arm: Define and use ARM_FEATURE_CBAR 2013-12-17 19:42:28 +00:00
helper.h
iwmmxt_helper.c
kvm32.c target-arm/kvm: Split 32 bit only code into its own file 2013-12-17 19:42:29 +00:00
kvm64.c target-arm: Add minimal KVM AArch64 support 2013-12-17 19:42:30 +00:00
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c target-arm: Add minimal KVM AArch64 support 2013-12-17 19:42:30 +00:00
machine.c
Makefile.objs target-arm: Add minimal KVM AArch64 support 2013-12-17 19:42:30 +00:00
neon_helper.c
op_addsub.h
op_helper.c
translate-a64.c target-arm: Split A64 from A32/T32 gen_intermediate_code_internal() 2013-12-17 19:42:31 +00:00
translate.c target-arm: Split A64 from A32/T32 gen_intermediate_code_internal() 2013-12-17 19:42:31 +00:00
translate.h target-arm: Split A64 from A32/T32 gen_intermediate_code_internal() 2013-12-17 19:42:31 +00:00