46 lines
1.4 KiB
C
46 lines
1.4 KiB
C
#ifndef AARCH64_TARGET_SYSCALL_H
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#define AARCH64_TARGET_SYSCALL_H
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struct target_pt_regs {
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uint64_t regs[31];
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uint64_t sp;
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uint64_t pc;
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uint64_t pstate;
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};
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#if defined(TARGET_WORDS_BIGENDIAN)
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#define UNAME_MACHINE "aarch64_be"
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#else
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#define UNAME_MACHINE "aarch64"
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#endif
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#define UNAME_MINIMUM_RELEASE "3.8.0"
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#define TARGET_CLONE_BACKWARDS
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#define TARGET_MCL_CURRENT 1
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#define TARGET_MCL_FUTURE 2
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#define TARGET_MCL_ONFAULT 4
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#define TARGET_PR_SVE_SET_VL 50
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#define TARGET_PR_SVE_GET_VL 51
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#define TARGET_PR_PAC_RESET_KEYS 54
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# define TARGET_PR_PAC_APIAKEY (1 << 0)
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# define TARGET_PR_PAC_APIBKEY (1 << 1)
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# define TARGET_PR_PAC_APDAKEY (1 << 2)
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# define TARGET_PR_PAC_APDBKEY (1 << 3)
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# define TARGET_PR_PAC_APGAKEY (1 << 4)
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#define TARGET_PR_SET_TAGGED_ADDR_CTRL 55
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#define TARGET_PR_GET_TAGGED_ADDR_CTRL 56
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# define TARGET_PR_TAGGED_ADDR_ENABLE (1UL << 0)
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/* MTE tag check fault modes */
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# define TARGET_PR_MTE_TCF_SHIFT 1
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# define TARGET_PR_MTE_TCF_NONE (0UL << TARGET_PR_MTE_TCF_SHIFT)
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# define TARGET_PR_MTE_TCF_SYNC (1UL << TARGET_PR_MTE_TCF_SHIFT)
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# define TARGET_PR_MTE_TCF_ASYNC (2UL << TARGET_PR_MTE_TCF_SHIFT)
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# define TARGET_PR_MTE_TCF_MASK (3UL << TARGET_PR_MTE_TCF_SHIFT)
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/* MTE tag inclusion mask */
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# define TARGET_PR_MTE_TAG_SHIFT 3
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# define TARGET_PR_MTE_TAG_MASK (0xffffUL << TARGET_PR_MTE_TAG_SHIFT)
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#endif /* AARCH64_TARGET_SYSCALL_H */
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