fd723105c1
LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE as "load/store quad word" and "shifted load/store" groups of instructions. This patch add implementation of these instructions: gslwlc1: similar to lwl but RT is FPR instead of GPR gslwrc1: similar to lwr but RT is FPR instead of GPR gsldlc1: similar to ldl but RT is FPR instead of GPR gsldrc1: similar to ldr but RT is FPR instead of GPR gsswlc1: similar to swl but RT is FPR instead of GPR gsswrc1: similar to swr but RT is FPR instead of GPR gssdlc1: similar to sdl but RT is FPR instead of GPR gssdrc1: similar to sdr but RT is FPR instead of GPR Details of Loongson-EXT is here: https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Message-Id: <1602831120-3377-4-git-send-email-chenhc@lemote.com> [PMD: Reuse t1 on MIPS32, reintroduce t2/fp0] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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| .. | ||
| cp0_helper.c | ||
| cp0_timer.c | ||
| cpu-param.h | ||
| cpu-qom.h | ||
| cpu.c | ||
| cpu.h | ||
| dsp_helper.c | ||
| fpu_helper.c | ||
| gdbstub.c | ||
| helper.c | ||
| helper.h | ||
| internal.h | ||
| kvm_mips.h | ||
| kvm.c | ||
| lmmi_helper.c | ||
| machine.c | ||
| meson.build | ||
| mips-defs.h | ||
| mips-semi.c | ||
| msa_helper.c | ||
| op_helper.c | ||
| TODO | ||
| trace-events | ||
| trace.h | ||
| translate_init.c.inc | ||
| translate.c | ||