Mark Cave-Ayland
fd7fbc8ff7
apb: fix IOMMU register sizes
According to the referenced documentation, the IOMMU has 3 64-bit registers consisting of a control register, base register and flush register. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org - QEMU team
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