0e2c24c626
The AST2600 includes a second cut-down version of the SD/MMC controller found in the AST2500, named the eMMC controller. It's cut down in the sense that it only supports one slot rather than two, but it brings the total number of slots supported by the AST2600 to three. The existing code assumed that the SD controller always provided two slots. Rework the SDHCI object to expose the number of slots as a property to be set by the SoC configuration. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200114103433.30534-2-clg@kaod.org [PMM: fixed up to use device_class_set_props()] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
36 lines
856 B
C
36 lines
856 B
C
/*
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* Aspeed SD Host Controller
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* Eddie James <eajames@linux.ibm.com>
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*
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* Copyright (C) 2019 IBM Corp
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* SPDX-License-Identifer: GPL-2.0-or-later
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*/
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#ifndef ASPEED_SDHCI_H
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#define ASPEED_SDHCI_H
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#include "hw/sd/sdhci.h"
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#define TYPE_ASPEED_SDHCI "aspeed.sdhci"
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#define ASPEED_SDHCI(obj) OBJECT_CHECK(AspeedSDHCIState, (obj), \
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TYPE_ASPEED_SDHCI)
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#define ASPEED_SDHCI_CAPABILITIES 0x01E80080
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#define ASPEED_SDHCI_NUM_SLOTS 2
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#define ASPEED_SDHCI_NUM_REGS (ASPEED_SDHCI_REG_SIZE / sizeof(uint32_t))
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#define ASPEED_SDHCI_REG_SIZE 0x100
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typedef struct AspeedSDHCIState {
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SysBusDevice parent;
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SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS];
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uint8_t num_slots;
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MemoryRegion iomem;
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qemu_irq irq;
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uint32_t regs[ASPEED_SDHCI_NUM_REGS];
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} AspeedSDHCIState;
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#endif /* ASPEED_SDHCI_H */
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