David Edmondson fea4500841 target/i386: Populate x86_ext_save_areas offsets using cpuid where possible ... Rather than relying on the X86XSaveArea structure definition, determine the offset of XSAVE state areas using CPUID leaf 0xd where possible (KVM and HVF). Signed-off-by: David Edmondson <david.edmondson@oracle.com> Message-Id: <20210705104632.2902400-8-david.edmondson@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2021-07-06 08:33:48 +02:00
..
alpha	target/alpha: Honor the FEN bit	2021-06-28 07:27:55 -07:00
arm	target/arm: Implement MVE shifts by register	2021-07-02 11:48:38 +01:00
avr	target/avr: Convert to TranslatorOps	2021-06-29 10:04:56 -07:00
cris	target/cris: Do not exit tb for X_FLAG changes	2021-06-29 10:04:56 -07:00
hexagon	Hexagon (target/hexagon) remove unused TCG variables	2021-06-29 11:32:50 -05:00
hppa	tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode	2021-06-19 08:51:11 -07:00
i386	target/i386: Populate x86_ext_save_areas offsets using cpuid where possible	2021-07-06 08:33:48 +02:00
m68k	tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode	2021-06-19 08:51:11 -07:00
microblaze	hw/core: Constify TCGCPUOps	2021-05-26 15:33:59 -07:00
mips	target/mips: Extract nanoMIPS ISA translation routines	2021-07-02 10:41:16 +02:00
nios2	target/nios2: Use pc_next for pc + 4	2021-06-29 10:03:11 -07:00
openrisc	hw/core: Constify TCGCPUOps	2021-05-26 15:33:59 -07:00
ppc	tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode	2021-06-19 08:51:11 -07:00
riscv	target/riscv: gdbstub: Fix dynamic CSR XML generation	2021-06-24 05:00:12 -07:00
rx	hw/core: Constify TCGCPUOps	2021-05-26 15:33:59 -07:00
s390x	tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64	2021-06-29 10:04:57 -07:00
sh4	target/sh4: Improve swap.b translation	2021-06-29 10:04:57 -07:00
sparc	docs: fix references to docs/devel/tracing.rst	2021-06-02 06:51:09 +02:00
tricore	hw/core: Constify TCGCPUOps	2021-05-26 15:33:59 -07:00
xtensa	hw/core: Constify TCGCPUOps	2021-05-26 15:33:59 -07:00
meson.build