f21673c35e
The .rst files outside docs/{devel,interop,specs} aren't built yet and
therefore a few syntax errors have slipped through. Fix them.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20191111094411.427174-1-stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
318 lines
15 KiB
ReStructuredText
318 lines
15 KiB
ReStructuredText
================
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ARM CPU Features
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================
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Examples of probing and using ARM CPU features
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Introduction
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============
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CPU features are optional features that a CPU of supporting type may
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choose to implement or not. In QEMU, optional CPU features have
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corresponding boolean CPU proprieties that, when enabled, indicate
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that the feature is implemented, and, conversely, when disabled,
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indicate that it is not implemented. An example of an ARM CPU feature
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is the Performance Monitoring Unit (PMU). CPU types such as the
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Cortex-A15 and the Cortex-A57, which respectively implement ARM
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architecture reference manuals ARMv7-A and ARMv8-A, may both optionally
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implement PMUs. For example, if a user wants to use a Cortex-A15 without
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a PMU, then the `-cpu` parameter should contain `pmu=off` on the QEMU
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command line, i.e. `-cpu cortex-a15,pmu=off`.
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As not all CPU types support all optional CPU features, then whether or
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not a CPU property exists depends on the CPU type. For example, CPUs
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that implement the ARMv8-A architecture reference manual may optionally
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support the AArch32 CPU feature, which may be enabled by disabling the
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`aarch64` CPU property. A CPU type such as the Cortex-A15, which does
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not implement ARMv8-A, will not have the `aarch64` CPU property.
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QEMU's support may be limited for some CPU features, only partially
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supporting the feature or only supporting the feature under certain
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configurations. For example, the `aarch64` CPU feature, which, when
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disabled, enables the optional AArch32 CPU feature, is only supported
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when using the KVM accelerator and when running on a host CPU type that
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supports the feature.
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CPU Feature Probing
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===================
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Determining which CPU features are available and functional for a given
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CPU type is possible with the `query-cpu-model-expansion` QMP command.
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Below are some examples where `scripts/qmp/qmp-shell` (see the top comment
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block in the script for usage) is used to issue the QMP commands.
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1. Determine which CPU features are available for the `max` CPU type
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(Note, we started QEMU with qemu-system-aarch64, so `max` is
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implementing the ARMv8-A reference manual in this case)::
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(QEMU) query-cpu-model-expansion type=full model={"name":"max"}
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{ "return": {
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"model": { "name": "max", "props": {
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"sve1664": true, "pmu": true, "sve1792": true, "sve1920": true,
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"sve128": true, "aarch64": true, "sve1024": true, "sve": true,
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"sve640": true, "sve768": true, "sve1408": true, "sve256": true,
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"sve1152": true, "sve512": true, "sve384": true, "sve1536": true,
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"sve896": true, "sve1280": true, "sve2048": true
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}}}}
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We see that the `max` CPU type has the `pmu`, `aarch64`, `sve`, and many
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`sve<N>` CPU features. We also see that all the CPU features are
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enabled, as they are all `true`. (The `sve<N>` CPU features are all
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optional SVE vector lengths (see "SVE CPU Properties"). While with TCG
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all SVE vector lengths can be supported, when KVM is in use it's more
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likely that only a few lengths will be supported, if SVE is supported at
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all.)
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(2) Let's try to disable the PMU::
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(QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"pmu":false}}
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{ "return": {
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"model": { "name": "max", "props": {
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"sve1664": true, "pmu": false, "sve1792": true, "sve1920": true,
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"sve128": true, "aarch64": true, "sve1024": true, "sve": true,
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"sve640": true, "sve768": true, "sve1408": true, "sve256": true,
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"sve1152": true, "sve512": true, "sve384": true, "sve1536": true,
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"sve896": true, "sve1280": true, "sve2048": true
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}}}}
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We see it worked, as `pmu` is now `false`.
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(3) Let's try to disable `aarch64`, which enables the AArch32 CPU feature::
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(QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"aarch64":false}}
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{"error": {
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"class": "GenericError", "desc":
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"'aarch64' feature cannot be disabled unless KVM is enabled and 32-bit EL1 is supported"
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}}
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It looks like this feature is limited to a configuration we do not
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currently have.
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(4) Let's disable `sve` and see what happens to all the optional SVE
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vector lengths::
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(QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"sve":false}}
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{ "return": {
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"model": { "name": "max", "props": {
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"sve1664": false, "pmu": true, "sve1792": false, "sve1920": false,
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"sve128": false, "aarch64": true, "sve1024": false, "sve": false,
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"sve640": false, "sve768": false, "sve1408": false, "sve256": false,
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"sve1152": false, "sve512": false, "sve384": false, "sve1536": false,
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"sve896": false, "sve1280": false, "sve2048": false
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}}}}
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As expected they are now all `false`.
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(5) Let's try probing CPU features for the Cortex-A15 CPU type::
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(QEMU) query-cpu-model-expansion type=full model={"name":"cortex-a15"}
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{"return": {"model": {"name": "cortex-a15", "props": {"pmu": true}}}}
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Only the `pmu` CPU feature is available.
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A note about CPU feature dependencies
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-------------------------------------
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It's possible for features to have dependencies on other features. I.e.
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it may be possible to change one feature at a time without error, but
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when attempting to change all features at once an error could occur
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depending on the order they are processed. It's also possible changing
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all at once doesn't generate an error, because a feature's dependencies
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are satisfied with other features, but the same feature cannot be changed
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independently without error. For these reasons callers should always
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attempt to make their desired changes all at once in order to ensure the
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collection is valid.
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A note about CPU models and KVM
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-------------------------------
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Named CPU models generally do not work with KVM. There are a few cases
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that do work, e.g. using the named CPU model `cortex-a57` with KVM on a
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seattle host, but mostly if KVM is enabled the `host` CPU type must be
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used. This means the guest is provided all the same CPU features as the
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host CPU type has. And, for this reason, the `host` CPU type should
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enable all CPU features that the host has by default. Indeed it's even
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a bit strange to allow disabling CPU features that the host has when using
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the `host` CPU type, but in the absence of CPU models it's the best we can
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do if we want to launch guests without all the host's CPU features enabled.
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Enabling KVM also affects the `query-cpu-model-expansion` QMP command. The
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affect is not only limited to specific features, as pointed out in example
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(3) of "CPU Feature Probing", but also to which CPU types may be expanded.
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When KVM is enabled, only the `max`, `host`, and current CPU type may be
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expanded. This restriction is necessary as it's not possible to know all
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CPU types that may work with KVM, but it does impose a small risk of users
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experiencing unexpected errors. For example on a seattle, as mentioned
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above, the `cortex-a57` CPU type is also valid when KVM is enabled.
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Therefore a user could use the `host` CPU type for the current type, but
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then attempt to query `cortex-a57`, however that query will fail with our
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restrictions. This shouldn't be an issue though as management layers and
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users have been preferring the `host` CPU type for use with KVM for quite
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some time. Additionally, if the KVM-enabled QEMU instance running on a
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seattle host is using the `cortex-a57` CPU type, then querying `cortex-a57`
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will work.
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Using CPU Features
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==================
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After determining which CPU features are available and supported for a
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given CPU type, then they may be selectively enabled or disabled on the
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QEMU command line with that CPU type::
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$ qemu-system-aarch64 -M virt -cpu max,pmu=off,sve=on,sve128=on,sve256=on
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The example above disables the PMU and enables the first two SVE vector
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lengths for the `max` CPU type. Note, the `sve=on` isn't actually
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necessary, because, as we observed above with our probe of the `max` CPU
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type, `sve` is already on by default. Also, based on our probe of
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defaults, it would seem we need to disable many SVE vector lengths, rather
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than only enabling the two we want. This isn't the case, because, as
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disabling many SVE vector lengths would be quite verbose, the `sve<N>` CPU
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properties have special semantics (see "SVE CPU Property Parsing
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Semantics").
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SVE CPU Properties
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==================
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There are two types of SVE CPU properties: `sve` and `sve<N>`. The first
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is used to enable or disable the entire SVE feature, just as the `pmu`
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CPU property completely enables or disables the PMU. The second type
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is used to enable or disable specific vector lengths, where `N` is the
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number of bits of the length. The `sve<N>` CPU properties have special
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dependencies and constraints, see "SVE CPU Property Dependencies and
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Constraints" below. Additionally, as we want all supported vector lengths
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to be enabled by default, then, in order to avoid overly verbose command
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lines (command lines full of `sve<N>=off`, for all `N` not wanted), we
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provide the parsing semantics listed in "SVE CPU Property Parsing
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Semantics".
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SVE CPU Property Dependencies and Constraints
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---------------------------------------------
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1) At least one vector length must be enabled when `sve` is enabled.
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2) If a vector length `N` is enabled, then, when KVM is enabled, all
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smaller, host supported vector lengths must also be enabled. If
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KVM is not enabled, then only all the smaller, power-of-two vector
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lengths must be enabled. E.g. with KVM if the host supports all
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vector lengths up to 512-bits (128, 256, 384, 512), then if `sve512`
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is enabled, the 128-bit vector length, 256-bit vector length, and
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384-bit vector length must also be enabled. Without KVM, the 384-bit
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vector length would not be required.
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3) If KVM is enabled then only vector lengths that the host CPU type
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support may be enabled. If SVE is not supported by the host, then
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no `sve*` properties may be enabled.
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SVE CPU Property Parsing Semantics
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----------------------------------
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1) If SVE is disabled (`sve=off`), then which SVE vector lengths
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are enabled or disabled is irrelevant to the guest, as the entire
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SVE feature is disabled and that disables all vector lengths for
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the guest. However QEMU will still track any `sve<N>` CPU
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properties provided by the user. If later an `sve=on` is provided,
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then the guest will get only the enabled lengths. If no `sve=on`
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is provided and there are explicitly enabled vector lengths, then
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an error is generated.
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2) If SVE is enabled (`sve=on`), but no `sve<N>` CPU properties are
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provided, then all supported vector lengths are enabled, which when
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KVM is not in use means including the non-power-of-two lengths, and,
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when KVM is in use, it means all vector lengths supported by the host
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processor.
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3) If SVE is enabled, then an error is generated when attempting to
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disable the last enabled vector length (see constraint (1) of "SVE
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CPU Property Dependencies and Constraints").
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4) If one or more vector lengths have been explicitly enabled and at
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at least one of the dependency lengths of the maximum enabled length
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has been explicitly disabled, then an error is generated (see
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constraint (2) of "SVE CPU Property Dependencies and Constraints").
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5) When KVM is enabled, if the host does not support SVE, then an error
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is generated when attempting to enable any `sve*` properties (see
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constraint (3) of "SVE CPU Property Dependencies and Constraints").
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6) When KVM is enabled, if the host does support SVE, then an error is
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generated when attempting to enable any vector lengths not supported
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by the host (see constraint (3) of "SVE CPU Property Dependencies and
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Constraints").
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7) If one or more `sve<N>` CPU properties are set `off`, but no `sve<N>`,
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CPU properties are set `on`, then the specified vector lengths are
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disabled but the default for any unspecified lengths remains enabled.
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When KVM is not enabled, disabling a power-of-two vector length also
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disables all vector lengths larger than the power-of-two length.
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When KVM is enabled, then disabling any supported vector length also
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disables all larger vector lengths (see constraint (2) of "SVE CPU
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Property Dependencies and Constraints").
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8) If one or more `sve<N>` CPU properties are set to `on`, then they
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are enabled and all unspecified lengths default to disabled, except
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for the required lengths per constraint (2) of "SVE CPU Property
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Dependencies and Constraints", which will even be auto-enabled if
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they were not explicitly enabled.
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9) If SVE was disabled (`sve=off`), allowing all vector lengths to be
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explicitly disabled (i.e. avoiding the error specified in (3) of
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"SVE CPU Property Parsing Semantics"), then if later an `sve=on` is
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provided an error will be generated. To avoid this error, one must
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enable at least one vector length prior to enabling SVE.
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SVE CPU Property Examples
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-------------------------
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1) Disable SVE::
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$ qemu-system-aarch64 -M virt -cpu max,sve=off
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2) Implicitly enable all vector lengths for the `max` CPU type::
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$ qemu-system-aarch64 -M virt -cpu max
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3) When KVM is enabled, implicitly enable all host CPU supported vector
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lengths with the `host` CPU type::
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$ qemu-system-aarch64 -M virt,accel=kvm -cpu host
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4) Only enable the 128-bit vector length::
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$ qemu-system-aarch64 -M virt -cpu max,sve128=on
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5) Disable the 512-bit vector length and all larger vector lengths,
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since 512 is a power-of-two. This results in all the smaller,
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uninitialized lengths (128, 256, and 384) defaulting to enabled::
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$ qemu-system-aarch64 -M virt -cpu max,sve512=off
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6) Enable the 128-bit, 256-bit, and 512-bit vector lengths::
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$ qemu-system-aarch64 -M virt -cpu max,sve128=on,sve256=on,sve512=on
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7) The same as (6), but since the 128-bit and 256-bit vector
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lengths are required for the 512-bit vector length to be enabled,
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then allow them to be auto-enabled::
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$ qemu-system-aarch64 -M virt -cpu max,sve512=on
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8) Do the same as (7), but by first disabling SVE and then re-enabling it::
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$ qemu-system-aarch64 -M virt -cpu max,sve=off,sve512=on,sve=on
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9) Force errors regarding the last vector length::
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$ qemu-system-aarch64 -M virt -cpu max,sve128=off
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$ qemu-system-aarch64 -M virt -cpu max,sve=off,sve128=off,sve=on
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SVE CPU Property Recommendations
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--------------------------------
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The examples in "SVE CPU Property Examples" exhibit many ways to select
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vector lengths which developers may find useful in order to avoid overly
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verbose command lines. However, the recommended way to select vector
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lengths is to explicitly enable each desired length. Therefore only
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example's (1), (4), and (6) exhibit recommended uses of the properties.
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