Alistair Francis ff832b77aa target/riscv: Don't set PMP feature in the cpu init ... The PMP is enabled by default via the "pmp" property so there is no need for us to set it in the init function. As all CPUs have PMP support just remove the set_feature() call in the CPU init functions. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>		2020-06-03 09:11:51 -07:00
..
insn_trans	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
cpu_bits.h	target/riscv: Add the MSTATUS_MPV_ISSET helper macro	2020-02-27 13:46:33 -08:00
cpu_helper.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
cpu_user.h	Supply missing header guards	2019-06-12 13:20:21 +02:00
cpu-param.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 07:03:34 -07:00
cpu.c	target/riscv: Don't set PMP feature in the cpu init	2020-06-03 09:11:51 -07:00
cpu.h	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
csr.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
fpu_helper.c	target/riscv: rationalise softfloat includes	2019-08-19 12:07:13 +01:00
gdbstub.c	gdbstub: extend GByteArray to read register helpers	2020-03-17 17:38:38 +00:00
helper.h
insn16-32.decode	target/riscv: Split RVC32 and RVC64 insns into separate files	2019-05-24 12:09:22 -07:00
insn16-64.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-24 12:09:25 -07:00
insn16.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-24 12:09:25 -07:00
insn32-64.decode	target/riscv: Convert RV64D insns to decodetree	2019-03-13 10:34:06 +01:00
insn32.decode	target/riscv: Remove the hret instruction	2020-02-27 13:45:45 -08:00
instmap.h	target/riscv: progressively load the instruction during decode	2020-02-25 20:20:23 +00:00
Makefile.objs	riscv: hmp: Add a command to show virtual memory mappings	2019-09-17 08:42:43 -07:00
monitor.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
op_helper.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
pmp.c	target/riscv: PMP violation due to wrong size parameter	2019-10-28 08:46:33 -07:00
pmp.h	RISC-V: Check for the effective memory privilege mode during PMP checks	2019-06-23 23:44:41 -07:00
trace-events	target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events	2019-09-17 08:42:42 -07:00
translate.c	target/riscv: Add the MSTATUS_MPV_ISSET helper macro	2020-02-27 13:46:33 -08:00