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[intrinsics] add div and rem vector tests

This commit is contained in:
gnzlbg 2017-11-06 13:37:26 +01:00
parent 94d9ff5303
commit 01ced6ecda
3 changed files with 21 additions and 6 deletions
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2
src/librustc_typeck/check/intrinsic.rs
View File

@ -348,7 +348,7 @@ pub fn check_platform_intrinsic_type<'a, 'tcx>(tcx: TyCtxt<'a, 'tcx, 'tcx>,
"simd_eq" | "simd_ne" | "simd_lt" | "simd_le" | "simd_gt" | "simd_ge" => {
(2, vec![param(0), param(0)], param(1))
}
"simd_add" | "simd_sub" | "simd_mul" |
"simd_add" | "simd_sub" | "simd_mul" | "simd_rem" |
"simd_div" | "simd_shl" | "simd_shr" |
"simd_and" | "simd_or" | "simd_xor" => {
(1, vec![param(0), param(0)], param(0))

11
src/test/compile-fail/simd-intrinsic-generic-arithmetic.rs
View File

@ -27,6 +27,7 @@ extern "platform-intrinsic" {
fn simd_sub<T>(x: T, y: T) -> T;
fn simd_mul<T>(x: T, y: T) -> T;
fn simd_div<T>(x: T, y: T) -> T;
fn simd_rem<T>(x: T, y: T) -> T;
fn simd_shl<T>(x: T, y: T) -> T;
fn simd_shr<T>(x: T, y: T) -> T;
fn simd_and<T>(x: T, y: T) -> T;
@ -49,8 +50,12 @@ fn main() {
simd_mul(x, x);
simd_mul(y, y);
simd_mul(z, z);
simd_div(x, x);
simd_div(y, y);
simd_div(z, z);
simd_rem(x, x);
simd_rem(y, y);
simd_rem(z, z);
simd_shl(x, x);
simd_shl(y, y);
@ -84,10 +89,6 @@ fn main() {
//~^ ERROR expected SIMD input type, found non-SIMD `i32`
simd_div(x, x);
//~^ ERROR unsupported operation on `i32x4` with element `i32`
simd_div(y, y);
//~^ ERROR unsupported operation on `u32x4` with element `u32`
simd_shl(z, z);
//~^ ERROR unsupported operation on `f32x4` with element `f32`
simd_shr(z, z);

14
src/test/run-pass/simd-intrinsic-generic-arithmetic.rs
View File

@ -35,6 +35,7 @@ extern "platform-intrinsic" {
fn simd_sub<T>(x: T, y: T) -> T;
fn simd_mul<T>(x: T, y: T) -> T;
fn simd_div<T>(x: T, y: T) -> T;
fn simd_rem<T>(x: T, y: T) -> T;
fn simd_shl<T>(x: T, y: T) -> T;
fn simd_shr<T>(x: T, y: T) -> T;
fn simd_and<T>(x: T, y: T) -> T;
@ -72,9 +73,22 @@ fn main() {
all_eq!(simd_sub(z2, z1), f32x4(1.0, 1.0, 1.0, 1.0));
all_eq!(simd_sub(z1, z2), f32x4(-1.0, -1.0, -1.0, -1.0));
all_eq!(simd_div(x1, x1), i32x4(1, 1, 1, 1));
all_eq!(simd_div(i32x4(2, 4, 6, 8), i32x4(2, 2, 2, 2)), x1);
all_eq!(simd_div(y1, y1), u32x4(1, 1, 1, 1));
all_eq!(simd_div(u32x4(2, 4, 6, 8), u32x4(2, 2, 2, 2)), y1);
all_eq!(simd_div(z1, z1), f32x4(1.0, 1.0, 1.0, 1.0));
all_eq!(simd_div(z1, z2), f32x4(1.0/2.0, 2.0/3.0, 3.0/4.0, 4.0/5.0));
all_eq!(simd_div(z2, z1), f32x4(2.0/1.0, 3.0/2.0, 4.0/3.0, 5.0/4.0));
all_eq!(simd_rem(x1, x1), i32x4(0, 0, 0, 0));
all_eq!(simd_rem(x2, x1), i32x4(0, 1, 1, 1));
all_eq!(simd_rem(y1, y1), u32x4(0, 0, 0, 0));
all_eq!(simd_rem(y2, y1), u32x4(0, 1, 1, 1));
all_eq!(simd_rem(z1, z1), f32x4(0.0, 0.0, 0.0, 0.0));
all_eq!(simd_rem(z1, z2), z1);
all_eq!(simd_rem(z2, z1), f32x4(0.0, 1.0, 1.0, 1.0));
all_eq!(simd_shl(x1, x2), i32x4(1 << 2, 2 << 3, 3 << 4, 4 << 5));
all_eq!(simd_shl(x2, x1), i32x4(2 << 1, 3 << 2, 4 << 3, 5 << 4));
all_eq!(simd_shl(y1, y2), u32x4(1 << 2, 2 << 3, 3 << 4, 4 << 5));