[RISCV] Enable LLVM backend.
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@ -62,7 +62,7 @@
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# not built by default and the experimental Rust compilation targets that depend
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# on them will not work unless the user opts in to building them. By default the
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# `WebAssembly` target is enabled when compiling LLVM from scratch.
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#experimental-targets = "WebAssembly"
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#experimental-targets = "WebAssembly;RISCV"
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# Cap the number of parallel linker invocations when compiling LLVM.
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# This can be useful when building LLVM with debug info, which significantly
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@ -100,6 +100,10 @@ fn main() {
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optional_components.push("hexagon");
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}
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if major > 6 {
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optional_components.push("riscv");
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}
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// FIXME: surely we don't need all these components, right? Stuff like mcjit
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// or interpreter the compiler itself never uses.
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let required_components = &["ipo",
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@ -90,6 +90,12 @@ pub fn initialize_available_targets() {
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LLVMInitializeMSP430Target,
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LLVMInitializeMSP430TargetMC,
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LLVMInitializeMSP430AsmPrinter);
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init_target!(llvm_component = "riscv",
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LLVMInitializeRISCVTargetInfo,
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LLVMInitializeRISCVTarget,
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LLVMInitializeRISCVTargetMC,
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LLVMInitializeRISCVAsmPrinter,
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LLVMInitializeRISCVAsmParser);
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init_target!(llvm_component = "sparc",
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LLVMInitializeSparcTargetInfo,
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LLVMInitializeSparcTarget,
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@ -171,6 +171,12 @@ bool LLVMRustPassManagerBuilderPopulateThinLTOPassManager(
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#define SUBTARGET_MSP430
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#endif
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#ifdef LLVM_COMPONENT_RISCV
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#define SUBTARGET_RISCV SUBTARGET(RISCV)
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#else
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#define SUBTARGET_RISCV
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#endif
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#ifdef LLVM_COMPONENT_SPARC
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#define SUBTARGET_SPARC SUBTARGET(Sparc)
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#else
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@ -192,7 +198,8 @@ bool LLVMRustPassManagerBuilderPopulateThinLTOPassManager(
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SUBTARGET_SYSTEMZ \
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SUBTARGET_MSP430 \
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SUBTARGET_SPARC \
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SUBTARGET_HEXAGON
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SUBTARGET_HEXAGON \
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SUBTARGET_RISCV \
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#define SUBTARGET(x) \
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namespace llvm { \
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