From 32d8d241599d8c72d23741db286e123a2f1cd7df Mon Sep 17 00:00:00 2001
From: est31 <MTest31@outlook.com>
Date: Sun, 20 Nov 2016 01:26:51 +0100
Subject: [PATCH] Fix rebase fallout

---
 src/libcompiler_builtins/lib.rs |  6 +++++-
 src/libcore/num/mod.rs          | 21 +++++++++++++++++++++
 src/librustc/ty/layout.rs       |  4 +++-
 3 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/src/libcompiler_builtins/lib.rs b/src/libcompiler_builtins/lib.rs
index a7345f169c5..ac22fa4bc95 100644
--- a/src/libcompiler_builtins/lib.rs
+++ b/src/libcompiler_builtins/lib.rs
@@ -448,7 +448,11 @@ pub mod reimpls {
             low += (t & lower_mask) << half_bits;
             high += t >> half_bits;
             high += (a.low() >> half_bits) * (b.low() >> half_bits);
-            high = high.wrapping_add(a.high().wrapping_mul(b.low()).wrapping_add(a.low().wrapping_mul(b.high())));
+            high = high
+                .wrapping_add(a.high()
+                .wrapping_mul(b.low())
+                .wrapping_add(a.low()
+                .wrapping_mul(b.high())));
             <$ty>::from_parts(low, high)
         }}
     }
diff --git a/src/libcore/num/mod.rs b/src/libcore/num/mod.rs
index 49e366a8976..61c687313dc 100644
--- a/src/libcore/num/mod.rs
+++ b/src/libcore/num/mod.rs
@@ -2614,6 +2614,27 @@ macro_rules! same_sign_try_from_int_impl {
     )*}
 }
 
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(u64, u8, u8, u16, u32, u64, usize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(i64, i8, i8, i16, i32, i64, isize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(u64, u16, u8, u16, u32, u64, usize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(i64, i16, i8, i16, i32, i64, isize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(u64, u32, u8, u16, u32, u64, usize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(i64, i32, i8, i16, i32, i64, isize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(u64, u64, u8, u16, u32, u64, usize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(i64, i64, i8, i16, i32, i64, isize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(u64, usize, u8, u16, u32, u64, usize);
+#[cfg(stage0)]
+same_sign_try_from_int_impl!(i64, isize, i8, i16, i32, i64, isize);
+
 #[cfg(not(stage0))]
 same_sign_try_from_int_impl!(u128, u8, u8, u16, u32, u64, u128, usize);
 #[cfg(not(stage0))]
diff --git a/src/librustc/ty/layout.rs b/src/librustc/ty/layout.rs
index ed2aa5e51b9..75600ddaabd 100644
--- a/src/librustc/ty/layout.rs
+++ b/src/librustc/ty/layout.rs
@@ -1198,7 +1198,9 @@ impl<'a, 'gcx, 'tcx> Layout {
 
                 if def.is_enum() && def.variants.iter().all(|v| v.fields.is_empty()) {
                     // All bodies empty -> intlike
-                    let (mut min, mut max, mut non_zero) = (i128::max_value(), i128::min_value(), true);
+                    let (mut min, mut max, mut non_zero) = (i128::max_value(),
+                                                            i128::min_value(),
+                                                            true);
                     for v in &def.variants {
                         let x = v.disr_val.to_u128_unchecked() as i128;
                         if x == 0 { non_zero = false; }