rustc: Remove platform intrinsics crate
This was originally attempted in #57048 but it was realized that we could fully remove the crate via the `"unadjusted"` ABI on intrinsics. This means that all intrinsics in stdsimd are implemented directly against LLVM rather than using the abstraction layer provided here. That ends up meaning that this crate is no longer used at all. This crate developed long ago to implement the SIMD intrinsics, but we didn't end up using it in the long run. In that case let's remove it!
This commit is contained in:
Alex Crichton
parent
d10680818b
commit
7616daabc7
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@ -2564,10 +2564,6 @@ dependencies = [
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"syntax_pos 0.0.0",
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]
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[[package]]
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name = "rustc_platform_intrinsics"
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version = "0.0.0"
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[[package]]
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name = "rustc_plugin"
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version = "0.0.0"
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@ -2678,7 +2674,6 @@ dependencies = [
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"rustc 0.0.0",
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"rustc_data_structures 0.0.0",
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"rustc_errors 0.0.0",
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"rustc_platform_intrinsics 0.0.0",
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"rustc_target 0.0.0",
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"smallvec 0.6.7 (registry+https://github.com/rust-lang/crates.io-index)",
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"syntax 0.0.0",
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@ -1,592 +0,0 @@
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{
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"platform": "aarch64_v",
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"intrinsic_prefix": "",
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"llvm_prefix": "llvm.aarch64.neon.",
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"number_info": {
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"signed": {
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"kind": "s",
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"data_type": { "pattern": "s{bitwidth}" }
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},
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"unsigned": {
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"kind": "u",
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"data_type": { "pattern": "u{bitwidth}" }
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},
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"float": {
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"kind": "f",
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"data_type": { "pattern": "f{bitwidth}" }
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}
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},
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"width_info": {
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"64": { "width": "" },
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"128": { "width": "q" }
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},
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"intrinsics": [
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{
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"intrinsic": "hadd{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}hadd.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "rhadd{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}rhadd.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qadd{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}qadd.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "uqadd_{0.data_type}",
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"width": [128],
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"llvm": "suqadd.{0.llvm_name}",
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"ret": "s(8-64)",
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"args": ["0", "0u"]
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},
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{
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"intrinsic": "sqadd_{0.data_type}",
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"width": [128],
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"llvm": "usqadd.{0.llvm_name}",
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"ret": "u(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "raddhn_{1.data_type}",
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"width": [64],
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"llvm": "raddhn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "0w"]
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},
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{
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"intrinsic": "fmulx{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "fmulx.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "fma{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.fma.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qdmulh{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "sqdmulh.{0.llvm_name}",
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"ret": "s(16-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qrdmulh{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "sqrdmulh.{0.llvm_name}",
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"ret": "s(16-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "mull_{1.data_type}",
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"width": [128],
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"llvm": "{0.kind}mull.{0.llvm_name}",
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"ret": "i(16-64)",
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"args": ["0n", "0n"]
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},
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{
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"intrinsic": "qdmull{0.width}_{1.data_type}",
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"width": [128],
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"llvm": "sqdmull.{0.llvm_name}",
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"ret": "s(16-32)",
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"args": ["0n", "0n"]
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},
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{
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"intrinsic": "hsub{0.width}_{1.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}hsub.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qsub{0.width}_{1.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}qsub.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "rsubhn_{1.data_type}",
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"width": [64],
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"llvm": "rsubhn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "0w"]
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},
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{
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"intrinsic": "abd{0.width}_{1.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}abd.{0.llvm_name}",
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"ret": ["i(8-32)","f(32-64)"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "max{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}max.{0.llvm_name}",
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"ret": ["i(8-32)","f(32-64)"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "min{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}min.{0.llvm_name}",
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"ret": ["i(8-32)","f(32-64)"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "maxnm{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}maxnm.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "minnm{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}minnm.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "shl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}shl.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "qshl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}qshl.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "rshl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}rshl.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "qrshl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}qrshl.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "qshrun_n_{1.data_type}",
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"width": [64],
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"llvm": "sqshrun.{0.llvm_name}",
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"ret": "s(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "qrshrun_n_{1.data_type}",
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"width": [64],
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"llvm": "sqrshrun.{0.llvm_name}",
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"ret": "s(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "qshrn_n_{1.data_type}",
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"width": [64],
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"llvm": "{0.kind}qshrn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "rshrn_n_{1.data_type}",
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"width": [64],
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"llvm": "rshrn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "qrshrn_n_{1.data_type}",
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"width": [64],
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"llvm": "{0.kind}qrshrn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "sri{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "vsri.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "sli{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "vsli.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "vqmovn_{1.data_type}",
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"width": [64],
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"llvm": "{0.kind}qxtn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w"]
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},
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{
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"intrinsic": "abs{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "abs.{0.llvm_name}",
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"ret": "s(8-64)",
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"args": ["0"]
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},
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{
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"intrinsic": "abs{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.fabs.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0"]
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},
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{
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"intrinsic": "qabs{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "sqabs.{0.llvm_name}",
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"ret": "s(8-64)",
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"args": ["0"]
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},
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{
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"intrinsic": "qneg{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "sqneg.{0.llvm_name}",
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"ret": "s(8-64)",
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"args": ["0"]
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},
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{
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"intrinsic": "clz{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.ctlz.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "cls{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "cls.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "cnt{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.ctpop.{0.llvm_name}",
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"ret": "i8",
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"args": ["0"]
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},
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{
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"intrinsic": "recpe{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}recpe.{0.llvm_name}",
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"ret": ["u32","f(32-64)"],
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"args": ["0"]
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},
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{
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"intrinsic": "recps{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "frecps.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "sqrt{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.sqrt.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0"]
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},
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{
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"intrinsic": "rsqrte{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}rsqrte.{0.llvm_name}",
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"ret": ["u32","f(32-64)"],
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"args": ["0"]
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},
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{
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"intrinsic": "rsqrts{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "frsqrts.{0.llvm_name}",
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "rbit{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "rbit.{0.llvm_name}",
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"ret": "i8",
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"args": ["0"]
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},
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{
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"intrinsic": "ld2{0[0].width}_{0[0].data_type}",
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"width": [64, 128],
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"llvm": "ld2.{0[0].llvm_name}.{1.llvm_name}",
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"ret": ["[i(8-64);2]","[f(32-64);2]"],
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"args": ["0.0SPc/0.0"]
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},
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{
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"intrinsic": "ld3{0[0].width}_{0[0].data_type}",
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"width": [64, 128],
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"llvm": "ld3.{0[0].llvm_name}.{1.llvm_name}",
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"ret": ["[i(8-64);3]","[f(32-64);3]"],
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"args": ["0.0SPc/0.0"]
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},
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{
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"intrinsic": "ld4{0[0].width}_{0[0].data_type}",
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"width": [64, 128],
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"llvm": "ld4.{0[0].llvm_name}.{1.llvm_name}",
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"ret": ["[i(8-64);4]","[f(32-64);4]"],
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"args": ["0.0SPc/0.0"]
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},
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{
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"intrinsic": "ld2{0[0].width}_dup_{0[0].data_type}",
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"width": [64, 128],
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"llvm": "ld2.{0[0].llvm_name}.{1.llvm_name}",
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"ret": ["[i(8-64);2]","[f(32-64);2]"],
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"args": ["0.0SPc"]
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},
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{
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"intrinsic": "ld3{0[0].width}_dup_{0[0].data_type}",
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"width": [64, 128],
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"llvm": "ld3.{0[0].llvm_name}.{1.llvm_name}",
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"ret": ["[i(8-64);3]","[f(32-64);3]"],
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"args": ["0.0SPc"]
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},
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{
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"intrinsic": "ld4{0[0].width}_dup_{0[0].data_type}",
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"width": [64, 128],
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"llvm": "ld4.{0[0].llvm_name}.{1.llvm_name}",
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"ret": ["[i(8-64);4]","[f(32-64);4]"],
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"args": ["0.0SPc"]
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},
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{
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"intrinsic": "padd{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "addp.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "padd{0.width}_{0.data_type}",
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"width": [128],
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"llvm": "addp.{0.llvm_name}",
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"ret": ["i64","f64"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "paddl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}addlp.{0.llvm_name}.{1.llvm_name}",
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"ret": "i(16-64)",
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"args": ["0dn"]
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},
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{
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"intrinsic": "pmax{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "{0.kind}maxp.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "pmax{0.width}_{0.data_type}",
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"width": [128],
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"llvm": "{0.kind}maxp.{0.llvm_name}",
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"ret": ["i64","f64"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "pmin{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}minp.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "pmin{0.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}minp.{0.llvm_name}",
|
||||
"ret": ["i64","f64"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "pmaxnm{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}maxnmp.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "pmaxnm{0.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}maxnmp.{0.llvm_name}",
|
||||
"ret": ["i64","f64"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "pminnm{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}minnmp.{0.llvm_name}",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "pminnm{0.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}minnmp.{0.llvm_name}",
|
||||
"ret": "f64",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "addv{1.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}addv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": ["I(8-32)","F32"],
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "addv{1.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}addv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": ["I64","F64"],
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "addlv{1.width}_{1.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}addlv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "I(16-64)",
|
||||
"args": ["0vdn"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "maxv{1.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}maxv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": ["I(8-32)","F32"],
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "maxv{1.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}maxv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "F64",
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "minv{1.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}minv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": ["I(8-32)","F32"],
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "minv{1.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}minv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "F64",
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "maxnmv{1.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}maxnmv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "F32",
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "maxnmv{1.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}maxnmv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "F64",
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "minnmv{1.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "{0.kind}minnmv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "F32",
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "minnmv{1.width}_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "{0.kind}minnmv.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "F64",
|
||||
"args": ["0v"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbl1{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbl1.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["0x128", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbx1{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbx1.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["0", "0x128", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbl2{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbl2.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["(0x128,0x128)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbx2{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbx2.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["(0x128,0x128)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbl3{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbl3.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["(0x128,0x128,0x128)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbx3{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbx3.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["0", "(0x128,0x128,0x128)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbl4{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbl4.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["(0x128,0x128,0x128,0x128)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qtbx4{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "tbx4.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["0", "(0x128,0x128,0x128,0x128)f", "0u"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,396 +0,0 @@
|
|||
{
|
||||
"platform": "arm_v",
|
||||
"intrinsic_prefix": "",
|
||||
"llvm_prefix": "llvm.arm.neon.v",
|
||||
"number_info": {
|
||||
"signed": {
|
||||
"kind": "s",
|
||||
"data_type": { "pattern": "s{bitwidth}" }
|
||||
},
|
||||
"unsigned": {
|
||||
"kind": "u",
|
||||
"data_type": { "pattern": "u{bitwidth}" }
|
||||
},
|
||||
"float": {
|
||||
"kind": "f",
|
||||
"data_type": { "pattern": "f{bitwidth}" }
|
||||
}
|
||||
},
|
||||
"width_info": {
|
||||
"64": { "width": "" },
|
||||
"128": { "width": "q" }
|
||||
},
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "hadd{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "hadd{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "rhadd{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "rhadd{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qadd{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "qadd{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "raddhn_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "raddhn.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0w", "0w"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "fma{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "!llvm.fma.{0.llvm_name}",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qdmulh{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "sqdmulh.{0.llvm_name}",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qrdmulh{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "sqrdmulh.{0.llvm_name}",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "mull_{1.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "mull{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(16-64)",
|
||||
"args": ["0n", "0n"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qdmull{0.width}_{1.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "sqdmull.{0.llvm_name}",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0n", "0n"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "hsub{0.width}_{1.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "hsub{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qsub{0.width}_{1.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "qsub{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "rsubhn_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "rsubhn.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0w", "0w"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "abd{0.width}_{1.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "abd{0.kind}.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "max{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "max{0.kind}.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "min{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "min{0.kind}.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "shl{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "shl{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0s"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qshl{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "qshl{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0s"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "rshl{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "rshl{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0s"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qrshl{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "qrshl{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0s"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qshrun_n_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "sqshrun.{0.llvm_name}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0w", "U32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qrshrun_n_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "sqrshrun.{0.llvm_name}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0w", "U32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qshrn_n_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "qshrn{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0w", "U32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "rshrn_n_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "rshrn.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0w", "U32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qrshrn_n_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "qrshrn{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0w", "U32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sri{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "vsri.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sli{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "vsli.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "vqmovn_{1.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "qxtn{0.kind}.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0w"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "abs{0.width}_{0.data_type}",
|
||||
"width": [64,128],
|
||||
"llvm": "abs.{0.llvm_name}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "abs{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "!llvm.fabs.{0.llvm_name}",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qabs{0.width}_{0.data_type}",
|
||||
"width": [64,128],
|
||||
"llvm": "sqabs.{0.llvm_name}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "qneg{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "sqneg.{0.llvm_name}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "clz{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "!llvm.ctlz.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "cls{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "cls.{0.llvm_name}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "cnt{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "!llvm.ctpop.{0.llvm_name}",
|
||||
"ret": "i8",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "recpe{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "recpe.{0.llvm_name}",
|
||||
"ret": ["u32","f32"],
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "recps{0.width}_{0.data_type}",
|
||||
"width": [64,128],
|
||||
"llvm": "frecps.{0.llvm_name}",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sqrt{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "!llvm.sqrt.{0.llvm_name}",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "rsqrte{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "rsqrte.{0.llvm_name}",
|
||||
"ret": ["u32","f32"],
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "rsqrts{0.width}_{0.data_type}",
|
||||
"width": [64,128],
|
||||
"llvm": "rsqrts.{0.llvm_name}",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "bsl{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "bsl.{0.llvm_name}",
|
||||
"ret": "i(8-64)",
|
||||
"args": ["0u", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "padd{0.width}_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "padd.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "paddl{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "paddl{0.kind}.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "i(16-64)",
|
||||
"args": ["0dn"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "padal{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "padal{0.kind}.{0.llvm_name}.{1.llvm_name}",
|
||||
"ret": "i(16-64)",
|
||||
"args": ["0", "0dn"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "pmax{0.width}_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "pmax{0.kind}.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "pmin{0.width}_{0.data_type}",
|
||||
"width": [64, 128],
|
||||
"llvm": "pmin{0.kind}.{0.llvm_name}",
|
||||
"ret": ["i(8-32)","f32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbl1_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbl1",
|
||||
"ret": "i8",
|
||||
"args": ["0", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbx1_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbx1",
|
||||
"ret": "i8",
|
||||
"args": ["0", "0", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbl2_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbl2",
|
||||
"ret": "i8",
|
||||
"args": ["(0,0)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbx2_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbx2",
|
||||
"ret": "i8",
|
||||
"args": ["(0,0)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbl3_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbl3",
|
||||
"ret": "i8",
|
||||
"args": ["(0,0,0)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbx3_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbx3",
|
||||
"ret": "i8",
|
||||
"args": ["0", "(0,0,0)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbl4_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbl4",
|
||||
"ret": "i8",
|
||||
"args": ["(0,0,0,0)f", "0u"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "tbx4_{0.data_type}",
|
||||
"width": [64],
|
||||
"llvm": "tbx4",
|
||||
"ret": "i8",
|
||||
"args": ["0", "(0,0,0,0)f", "0u"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,854 +0,0 @@
|
|||
from __future__ import division, print_function
|
||||
import json
|
||||
import argparse
|
||||
import sys
|
||||
import re
|
||||
import textwrap
|
||||
import itertools
|
||||
|
||||
SPEC = re.compile(
|
||||
r'^(?:(?P<void>V)|(?P<id>[iusfIUSF])(?:\((?P<start>\d+)-(?P<end>\d+)\)|'
|
||||
r'(?P<width>\d+)(:?/(?P<llvm_width>\d+))?)'
|
||||
r'|(?P<reference>\d+))(?P<index>\.\d+)?(?P<modifiers>[vShdnwusfDMCNW]*)(?P<force_width>x\d+)?'
|
||||
r'(?:(?P<pointer>Pm|Pc)(?P<llvm_pointer>/.*)?|(?P<bitcast>->.*))?$'
|
||||
)
|
||||
|
||||
class PlatformInfo(object):
|
||||
def __init__(self, json):
|
||||
self._platform = json['platform']
|
||||
|
||||
def platform_prefix(self):
|
||||
return self._platform
|
||||
|
||||
class IntrinsicSet(object):
|
||||
def __init__(self, platform, json):
|
||||
self._llvm_prefix = json['llvm_prefix']
|
||||
self._type_info = json['number_info']
|
||||
self._intrinsics = json['intrinsics']
|
||||
self._widths = json['width_info']
|
||||
self._platform = platform
|
||||
self._intrinsic_prefix = json['intrinsic_prefix']
|
||||
|
||||
def intrinsics(self):
|
||||
for raw in self._intrinsics:
|
||||
yield GenericIntrinsic(self,
|
||||
raw['intrinsic'], raw['width'], raw['llvm'],
|
||||
raw['ret'], raw['args'])
|
||||
|
||||
def platform(self):
|
||||
return self._platform
|
||||
|
||||
def intrinsic_prefix(self):
|
||||
return self._intrinsic_prefix
|
||||
|
||||
def llvm_prefix(self):
|
||||
return self._llvm_prefix
|
||||
|
||||
def width_info(self, bitwidth):
|
||||
return self._widths[str(bitwidth)]
|
||||
|
||||
def number_type_info(self, value):
|
||||
data = self._type_info[value.__class__.__name__.lower()]
|
||||
bitwidth = value.bitwidth()
|
||||
def lookup(raw):
|
||||
if not isinstance(raw, dict):
|
||||
return raw
|
||||
|
||||
try:
|
||||
return raw[str(bitwidth)]
|
||||
except KeyError:
|
||||
return raw['pattern'].format(bitwidth = bitwidth)
|
||||
|
||||
return PlatformTypeInfo(value.llvm_name(),
|
||||
{k: lookup(v) for k, v in data.items()})
|
||||
|
||||
class PlatformTypeInfo(object):
|
||||
def __init__(self, llvm_name, properties, elems = None):
|
||||
if elems is None:
|
||||
self.properties = properties
|
||||
self.llvm_name = llvm_name
|
||||
else:
|
||||
assert properties is None and llvm_name is None
|
||||
self.properties = {}
|
||||
self.elems = elems
|
||||
|
||||
def __repr__(self):
|
||||
return '<PlatformTypeInfo {}, {}>'.format(self.llvm_name, self.properties)
|
||||
|
||||
def __getattr__(self, name):
|
||||
return self.properties[name]
|
||||
|
||||
def __getitem__(self, idx):
|
||||
return self.elems[idx]
|
||||
|
||||
def vectorize(self, length, width_info):
|
||||
props = self.properties.copy()
|
||||
props.update(width_info)
|
||||
return PlatformTypeInfo('v{}{}'.format(length, self.llvm_name), props)
|
||||
|
||||
def pointer(self, llvm_elem):
|
||||
name = self.llvm_name if llvm_elem is None else llvm_elem.llvm_name
|
||||
return PlatformTypeInfo('p0{}'.format(name), self.properties)
|
||||
|
||||
BITWIDTH_POINTER = '<pointer>'
|
||||
|
||||
class Type(object):
|
||||
def __init__(self, bitwidth):
|
||||
self._bitwidth = bitwidth
|
||||
|
||||
def bitwidth(self):
|
||||
return self._bitwidth
|
||||
|
||||
def modify(self, spec, width, previous):
|
||||
raise NotImplementedError()
|
||||
|
||||
def __ne__(self, other):
|
||||
return not (self == other)
|
||||
|
||||
class Void(Type):
|
||||
def __init__(self):
|
||||
Type.__init__(self, 0)
|
||||
|
||||
@staticmethod
|
||||
def compiler_ctor():
|
||||
return '::VOID'
|
||||
|
||||
def compiler_ctor_ref(self):
|
||||
return '&' + self.compiler_ctor()
|
||||
|
||||
@staticmethod
|
||||
def rust_name():
|
||||
return '()'
|
||||
|
||||
@staticmethod
|
||||
def type_info(platform_info):
|
||||
return None
|
||||
|
||||
def __eq__(self, other):
|
||||
return isinstance(other, Void)
|
||||
|
||||
class Number(Type):
|
||||
def __init__(self, bitwidth):
|
||||
Type.__init__(self, bitwidth)
|
||||
|
||||
def modify(self, spec, width, previous):
|
||||
if spec == 'u':
|
||||
return Unsigned(self.bitwidth())
|
||||
elif spec == 's':
|
||||
return Signed(self.bitwidth())
|
||||
elif spec == 'f':
|
||||
return Float(self.bitwidth())
|
||||
elif spec == 'w':
|
||||
return self.__class__(self.bitwidth() * 2)
|
||||
elif spec == 'n':
|
||||
return self.__class__(self.bitwidth() // 2)
|
||||
elif spec == 'v':
|
||||
return Vector(self, width // self.bitwidth())
|
||||
else:
|
||||
raise ValueError('unknown modification spec {}', spec)
|
||||
|
||||
def type_info(self, platform_info):
|
||||
return platform_info.number_type_info(self)
|
||||
|
||||
def __eq__(self, other):
|
||||
# print(self, other)
|
||||
return self.__class__ == other.__class__ and self.bitwidth() == other.bitwidth()
|
||||
|
||||
class Signed(Number):
|
||||
def __init__(self, bitwidth, llvm_bitwidth = None):
|
||||
Number.__init__(self, bitwidth)
|
||||
self._llvm_bitwidth = llvm_bitwidth
|
||||
|
||||
|
||||
def compiler_ctor(self):
|
||||
if self._llvm_bitwidth is None:
|
||||
return '::I{}'.format(self.bitwidth())
|
||||
else:
|
||||
return '::I{}_{}'.format(self.bitwidth(), self._llvm_bitwidth)
|
||||
|
||||
def compiler_ctor_ref(self):
|
||||
return '&' + self.compiler_ctor()
|
||||
|
||||
def llvm_name(self):
|
||||
bw = self._llvm_bitwidth or self.bitwidth()
|
||||
return 'i{}'.format(bw)
|
||||
|
||||
def rust_name(self):
|
||||
return 'i{}'.format(self.bitwidth())
|
||||
|
||||
class Unsigned(Number):
|
||||
def __init__(self, bitwidth, llvm_bitwidth = None):
|
||||
Number.__init__(self, bitwidth)
|
||||
self._llvm_bitwidth = llvm_bitwidth
|
||||
|
||||
def compiler_ctor(self):
|
||||
if self._llvm_bitwidth is None:
|
||||
return '::U{}'.format(self.bitwidth())
|
||||
else:
|
||||
return '::U{}_{}'.format(self.bitwidth(), self._llvm_bitwidth)
|
||||
|
||||
def compiler_ctor_ref(self):
|
||||
return '&' + self.compiler_ctor()
|
||||
|
||||
def llvm_name(self):
|
||||
bw = self._llvm_bitwidth or self.bitwidth()
|
||||
return 'i{}'.format(bw)
|
||||
|
||||
def rust_name(self):
|
||||
return 'u{}'.format(self.bitwidth())
|
||||
|
||||
class Float(Number):
|
||||
def __init__(self, bitwidth):
|
||||
assert bitwidth in (32, 64)
|
||||
Number.__init__(self, bitwidth)
|
||||
|
||||
def compiler_ctor(self):
|
||||
return '::F{}'.format(self.bitwidth())
|
||||
|
||||
def compiler_ctor_ref(self):
|
||||
return '&' + self.compiler_ctor()
|
||||
|
||||
def llvm_name(self):
|
||||
return 'f{}'.format(self.bitwidth())
|
||||
|
||||
def rust_name(self):
|
||||
return 'f{}'.format(self.bitwidth())
|
||||
|
||||
class Vector(Type):
|
||||
def __init__(self, elem, length, bitcast = None):
|
||||
assert isinstance(elem, Type) and not isinstance(elem, Vector)
|
||||
Type.__init__(self,
|
||||
elem.bitwidth() * length)
|
||||
self._length = length
|
||||
self._elem = elem
|
||||
assert bitcast is None or (isinstance(bitcast, Vector) and
|
||||
bitcast._bitcast is None and
|
||||
bitcast._elem.bitwidth() == elem.bitwidth())
|
||||
if bitcast is not None and bitcast._elem != elem:
|
||||
self._bitcast = bitcast._elem
|
||||
else:
|
||||
self._bitcast = None
|
||||
|
||||
def modify(self, spec, width, previous):
|
||||
if spec == 'S':
|
||||
return self._elem
|
||||
elif spec == 'h':
|
||||
return Vector(self._elem, self._length // 2)
|
||||
elif spec == 'd':
|
||||
return Vector(self._elem, self._length * 2)
|
||||
elif spec == 'N':
|
||||
elem = self._elem.__class__(self._elem.bitwidth() // 2)
|
||||
return Vector(elem, self._length * 2)
|
||||
elif spec == 'W':
|
||||
elem = self._elem.__class__(self._elem.bitwidth() * 2)
|
||||
return Vector(elem, self._length // 2)
|
||||
elif spec.startswith('x'):
|
||||
new_bitwidth = int(spec[1:])
|
||||
return Vector(self._elem, new_bitwidth // self._elem.bitwidth())
|
||||
elif spec.startswith('->'):
|
||||
bitcast_to = TypeSpec(spec[2:])
|
||||
choices = list(bitcast_to.enumerate(width, previous))
|
||||
assert len(choices) == 1
|
||||
bitcast_to = choices[0]
|
||||
return Vector(self._elem, self._length, bitcast_to)
|
||||
else:
|
||||
return Vector(self._elem.modify(spec, width, previous), self._length)
|
||||
|
||||
def compiler_ctor(self):
|
||||
if self._bitcast is None:
|
||||
return '{}x{}'.format(self._elem.compiler_ctor(),
|
||||
self._length)
|
||||
else:
|
||||
return '{}x{}_{}'.format(self._elem.compiler_ctor(),
|
||||
self._length,
|
||||
self._bitcast.compiler_ctor()
|
||||
.replace('::', ''))
|
||||
|
||||
def compiler_ctor_ref(self):
|
||||
return '&' + self.compiler_ctor()
|
||||
|
||||
def rust_name(self):
|
||||
return '{}x{}'.format(self._elem.rust_name(), self._length)
|
||||
|
||||
def type_info(self, platform_info):
|
||||
elem_info = self._elem.type_info(platform_info)
|
||||
return elem_info.vectorize(self._length,
|
||||
platform_info.width_info(self.bitwidth()))
|
||||
|
||||
def __eq__(self, other):
|
||||
return isinstance(other, Vector) and self._length == other._length and \
|
||||
self._elem == other._elem and self._bitcast == other._bitcast
|
||||
|
||||
class Pointer(Type):
|
||||
def __init__(self, elem, llvm_elem, const):
|
||||
self._elem = elem
|
||||
self._llvm_elem = llvm_elem
|
||||
self._const = const
|
||||
Type.__init__(self, BITWIDTH_POINTER)
|
||||
|
||||
def modify(self, spec, width, previous):
|
||||
if spec == 'D':
|
||||
return self._elem
|
||||
elif spec == 'M':
|
||||
return Pointer(self._elem, self._llvm_elem, False)
|
||||
elif spec == 'C':
|
||||
return Pointer(self._elem, self._llvm_elem, True)
|
||||
else:
|
||||
return Pointer(self._elem.modify(spec, width, previous), self._llvm_elem, self._const)
|
||||
|
||||
def compiler_ctor(self):
|
||||
if self._llvm_elem is None:
|
||||
llvm_elem = 'None'
|
||||
else:
|
||||
llvm_elem = 'Some({})'.format(self._llvm_elem.compiler_ctor_ref())
|
||||
return 'Type::Pointer({}, {}, {})'.format(self._elem.compiler_ctor_ref(),
|
||||
llvm_elem,
|
||||
'true' if self._const else 'false')
|
||||
|
||||
def compiler_ctor_ref(self):
|
||||
return "{{ static PTR: Type = {}; &PTR }}".format(self.compiler_ctor())
|
||||
|
||||
|
||||
def rust_name(self):
|
||||
return '*{} {}'.format('const' if self._const else 'mut',
|
||||
self._elem.rust_name())
|
||||
|
||||
def type_info(self, platform_info):
|
||||
if self._llvm_elem is None:
|
||||
llvm_elem = None
|
||||
else:
|
||||
llvm_elem = self._llvm_elem.type_info(platform_info)
|
||||
return self._elem.type_info(platform_info).pointer(llvm_elem)
|
||||
|
||||
def __eq__(self, other):
|
||||
return isinstance(other, Pointer) and self._const == other._const \
|
||||
and self._elem == other._elem and self._llvm_elem == other._llvm_elem
|
||||
|
||||
class Aggregate(Type):
|
||||
def __init__(self, flatten, elems):
|
||||
self._flatten = flatten
|
||||
self._elems = elems
|
||||
Type.__init__(self, sum(elem.bitwidth() for elem in elems))
|
||||
|
||||
def __repr__(self):
|
||||
return '<Aggregate {}>'.format(self._elems)
|
||||
|
||||
def modify(self, spec, width, previous):
|
||||
if spec.startswith('.'):
|
||||
num = int(spec[1:])
|
||||
return self._elems[num]
|
||||
else:
|
||||
print(spec)
|
||||
raise NotImplementedError()
|
||||
|
||||
def compiler_ctor(self):
|
||||
parts = "{{ static PARTS: [&'static Type; {}] = [{}]; &PARTS }}"
|
||||
elems = ', '.join(elem.compiler_ctor_ref() for elem in self._elems)
|
||||
parts = parts.format(len(self._elems), elems)
|
||||
return 'Type::Aggregate({}, {})'.format('true' if self._flatten else 'false',
|
||||
parts)
|
||||
|
||||
def compiler_ctor_ref(self):
|
||||
return "{{ static AGG: Type = {}; &AGG }}".format(self.compiler_ctor())
|
||||
|
||||
def rust_name(self):
|
||||
return '({})'.format(', '.join(elem.rust_name() for elem in self._elems))
|
||||
|
||||
def type_info(self, platform_info):
|
||||
return PlatformTypeInfo(None, None, [elem.type_info(platform_info) for elem in self._elems])
|
||||
|
||||
def __eq__(self, other):
|
||||
return isinstance(other, Aggregate) and self._flatten == other._flatten and \
|
||||
self._elems == other._elems
|
||||
|
||||
|
||||
TYPE_ID_LOOKUP = {'i': [Signed, Unsigned],
|
||||
's': [Signed],
|
||||
'u': [Unsigned],
|
||||
'f': [Float]}
|
||||
|
||||
def ptrify(match, elem, width, previous):
|
||||
ptr = match.group('pointer')
|
||||
if ptr is None:
|
||||
return elem
|
||||
else:
|
||||
llvm_ptr = match.group('llvm_pointer')
|
||||
if llvm_ptr is None:
|
||||
llvm_elem = None
|
||||
else:
|
||||
assert llvm_ptr.startswith('/')
|
||||
options = list(TypeSpec(llvm_ptr[1:]).enumerate(width, previous))
|
||||
assert len(options) == 1
|
||||
llvm_elem = options[0]
|
||||
assert ptr in ('Pc', 'Pm')
|
||||
return Pointer(elem, llvm_elem, ptr == 'Pc')
|
||||
|
||||
class TypeSpec(object):
|
||||
def __init__(self, spec):
|
||||
if not isinstance(spec, list):
|
||||
spec = [spec]
|
||||
|
||||
self.spec = spec
|
||||
|
||||
def enumerate(self, width, previous):
|
||||
for spec in self.spec:
|
||||
match = SPEC.match(spec)
|
||||
if match is not None:
|
||||
id = match.group('id')
|
||||
reference = match.group('reference')
|
||||
|
||||
modifiers = []
|
||||
index = match.group('index')
|
||||
if index is not None:
|
||||
modifiers.append(index)
|
||||
modifiers += list(match.group('modifiers') or '')
|
||||
force = match.group('force_width')
|
||||
if force is not None:
|
||||
modifiers.append(force)
|
||||
bitcast = match.group('bitcast')
|
||||
if bitcast is not None:
|
||||
modifiers.append(bitcast)
|
||||
|
||||
if match.group('void') is not None:
|
||||
assert spec == 'V'
|
||||
yield Void()
|
||||
elif id is not None:
|
||||
is_vector = id.islower()
|
||||
type_ctors = TYPE_ID_LOOKUP[id.lower()]
|
||||
|
||||
start = match.group('start')
|
||||
if start is not None:
|
||||
end = match.group('end')
|
||||
llvm_width = None
|
||||
else:
|
||||
start = end = match.group('width')
|
||||
llvm_width = match.group('llvm_width')
|
||||
start = int(start)
|
||||
end = int(end)
|
||||
|
||||
bitwidth = start
|
||||
while bitwidth <= end:
|
||||
for ctor in type_ctors:
|
||||
if llvm_width is not None:
|
||||
assert not is_vector
|
||||
llvm_width = int(llvm_width)
|
||||
assert llvm_width < bitwidth
|
||||
scalar = ctor(bitwidth, llvm_width)
|
||||
else:
|
||||
scalar = ctor(bitwidth)
|
||||
|
||||
if is_vector:
|
||||
elem = Vector(scalar, width // bitwidth)
|
||||
else:
|
||||
assert bitcast is None
|
||||
elem = scalar
|
||||
|
||||
for x in modifiers:
|
||||
elem = elem.modify(x, width, previous)
|
||||
yield ptrify(match, elem, width, previous)
|
||||
bitwidth *= 2
|
||||
elif reference is not None:
|
||||
reference = int(reference)
|
||||
assert reference < len(previous), \
|
||||
'referring to argument {}, but only {} are known'.format(reference,
|
||||
len(previous))
|
||||
ret = previous[reference]
|
||||
for x in modifiers:
|
||||
ret = ret.modify(x, width, previous)
|
||||
yield ptrify(match, ret, width, previous)
|
||||
else:
|
||||
assert False, 'matched `{}`, but didn\'t understand it?'.format(spec)
|
||||
elif spec.startswith('('):
|
||||
if spec.endswith(')'):
|
||||
true_spec = spec[1:-1]
|
||||
flatten = False
|
||||
elif spec.endswith(')f'):
|
||||
true_spec = spec[1:-2]
|
||||
flatten = True
|
||||
else:
|
||||
assert False, 'found unclosed aggregate `{}`'.format(spec)
|
||||
|
||||
for elems in itertools.product(*(TypeSpec(subspec).enumerate(width, previous)
|
||||
for subspec in true_spec.split(','))):
|
||||
yield Aggregate(flatten, elems)
|
||||
elif spec.startswith('['):
|
||||
if spec.endswith(']'):
|
||||
true_spec = spec[1:-1]
|
||||
flatten = False
|
||||
elif spec.endswith(']f'):
|
||||
true_spec = spec[1:-2]
|
||||
flatten = True
|
||||
else:
|
||||
assert False, 'found unclosed aggregate `{}`'.format(spec)
|
||||
elem_spec, count = true_spec.split(';')
|
||||
|
||||
count = int(count)
|
||||
for elem in TypeSpec(elem_spec).enumerate(width, previous):
|
||||
yield Aggregate(flatten, [elem] * count)
|
||||
else:
|
||||
assert False, 'Failed to parse `{}`'.format(spec)
|
||||
|
||||
class GenericIntrinsic(object):
|
||||
def __init__(self, platform, intrinsic, widths, llvm_name, ret, args):
|
||||
self._platform = platform
|
||||
self.intrinsic = intrinsic
|
||||
self.widths = map(int, widths)
|
||||
self.llvm_name = llvm_name
|
||||
self.ret = TypeSpec(ret)
|
||||
self.args = list(map(TypeSpec, args))
|
||||
|
||||
def monomorphise(self):
|
||||
for width in self.widths:
|
||||
# must be a power of two
|
||||
assert width & (width - 1) == 0
|
||||
def recur(processed, untouched):
|
||||
if not untouched:
|
||||
ret = processed[0]
|
||||
args = processed[1:]
|
||||
yield MonomorphicIntrinsic(self._platform, self.intrinsic, width,
|
||||
self.llvm_name,
|
||||
ret, args)
|
||||
else:
|
||||
raw_arg = untouched[0]
|
||||
rest = untouched[1:]
|
||||
for arg in raw_arg.enumerate(width, processed):
|
||||
for intr in recur(processed + [arg], rest):
|
||||
yield intr
|
||||
|
||||
for x in recur([], [self.ret] + self.args):
|
||||
yield x
|
||||
|
||||
class MonomorphicIntrinsic(object):
|
||||
def __init__(self, platform, intrinsic, width, llvm_name, ret, args):
|
||||
self._platform = platform
|
||||
self._intrinsic = intrinsic
|
||||
self._width = '' if width == 64 else 'q'
|
||||
self._llvm_name = llvm_name
|
||||
self._ret_raw = ret
|
||||
self._ret = ret.type_info(platform)
|
||||
self._args_raw = args
|
||||
self._args = [arg.type_info(platform) for arg in args]
|
||||
|
||||
def llvm_name(self):
|
||||
if self._llvm_name.startswith('!'):
|
||||
return self._llvm_name[1:].format(self._ret, *self._args)
|
||||
else:
|
||||
return self._platform.llvm_prefix() + self._llvm_name.format(self._ret, *self._args)
|
||||
|
||||
def intrinsic_suffix(self):
|
||||
return self._intrinsic.format(self._ret,
|
||||
*self._args,
|
||||
width = self._width)
|
||||
|
||||
def platform_prefix(self):
|
||||
return self._platform.platform().platform_prefix()
|
||||
|
||||
def intrinsic_set_name(self):
|
||||
return self._platform.intrinsic_prefix()
|
||||
|
||||
def intrinsic_name(self):
|
||||
return self._platform.intrinsic_prefix() + self.intrinsic_suffix()
|
||||
|
||||
def compiler_args(self):
|
||||
return ', '.join(arg.compiler_ctor_ref() for arg in self._args_raw)
|
||||
|
||||
def compiler_ret(self):
|
||||
return self._ret_raw.compiler_ctor_ref()
|
||||
|
||||
def compiler_signature(self):
|
||||
return '({}) -> {}'.format(self.compiler_args(), self.compiler_ret())
|
||||
|
||||
def intrinsic_signature(self):
|
||||
names = 'xyzwabcdef'
|
||||
return '({}) -> {}'.format(', '.join('{}: {}'.format(name, arg.rust_name())
|
||||
for name, arg in zip(names, self._args_raw)),
|
||||
self._ret_raw.rust_name())
|
||||
|
||||
def parse_args():
|
||||
parser = argparse.ArgumentParser(
|
||||
formatter_class = argparse.RawDescriptionHelpFormatter,
|
||||
description = 'Render an intrinsic definition JSON to various formats.',
|
||||
epilog = textwrap.dedent('''\
|
||||
Quick How-To:
|
||||
|
||||
There are two operating modes: single file and multiple files.
|
||||
|
||||
For example, ARM is specified as a single file. To generate the
|
||||
compiler-definitions for ARM just pass the script the "arm.json" file:
|
||||
|
||||
python generator.py --format compiler-defs arm.json
|
||||
|
||||
The X86 architecture is specified as multiple files (for the different
|
||||
instruction sets that x86 supports). To generate the compiler
|
||||
definitions one needs to pass the script a "platform information file"
|
||||
(with the -i flag) next to the files of the different instruction sets.
|
||||
For example, to generate the X86 compiler-definitions for SSE4.2, just:
|
||||
|
||||
python generator.py --format compiler-defs -i x86/info.json sse42.json
|
||||
|
||||
And to generate the compiler-definitions for SSE4.1 and SSE4.2, just:
|
||||
|
||||
python generator.py --format compiler-defs -i x86/info.json sse41.json sse42.json
|
||||
|
||||
An intrinsic definition consists of a map with fields:
|
||||
- intrinsic: pattern for the name(s) of the vendor's C intrinsic(s)
|
||||
- llvm: pattern for the name(s) of the internal llvm intrinsic(s)
|
||||
- width: a vector of vector bit-widths the pattern works with
|
||||
- ret: type specifier for the return value
|
||||
- arguments: vector of type specifiers for arguments
|
||||
|
||||
The width and types describe a range of possible intrinsics,
|
||||
and these are fed back into the intrinsic and llvm patterns to
|
||||
create the appropriate definitions.
|
||||
|
||||
## Type specifier grammar
|
||||
|
||||
```
|
||||
type := core_type modifier* suffix?
|
||||
|
||||
core_type := void | vector | scalar | aggregate | reference
|
||||
|
||||
modifier := 'v' | 'h' | 'd' | 'n' | 'w' | 'u' | 's' |
|
||||
'x' number | '.' number
|
||||
suffix := pointer | bitcast
|
||||
pointer := 'Pm' llvm_pointer? | 'Pc' llvm_pointer?
|
||||
llvm_pointer := '/' type
|
||||
bitcast := '->' type
|
||||
|
||||
void := 'V'
|
||||
|
||||
vector := vector_elem width |
|
||||
vector_elem := 'i' | 'u' | 's' | 'f'
|
||||
|
||||
scalar := scalar_type number llvm_width?
|
||||
scalar_type := 'U' | 'S' | 'F'
|
||||
llvm_width := '/' number
|
||||
|
||||
aggregate := '(' (type),* ')' 'f'? | '[' type ';' number ']' 'f'?
|
||||
|
||||
reference := number
|
||||
|
||||
width = number | '(' number '-' number ')'
|
||||
|
||||
number = [0-9]+
|
||||
```
|
||||
|
||||
## Void
|
||||
|
||||
The `V` type corresponds to `void` in LLVM (`()` in
|
||||
Rust). It's likely to only work in return position.
|
||||
|
||||
## Vectors
|
||||
|
||||
The vector grammar is a pattern describing many possibilities
|
||||
for arguments/return value. The `vector_elem` describes the
|
||||
types of elements to use, and the `width` describes the (range
|
||||
of) widths for those elements, which are then placed into a
|
||||
vector with the `width` bitwidth. E.g. if an intrinsic has a
|
||||
`width` that includes 128, and the return value is `i(8-32)`,
|
||||
then some instantiation of that intrinsic will be `u8x16`,
|
||||
`u32x4`, `i32x4`, etc.
|
||||
|
||||
### Elements
|
||||
|
||||
- i: integer, both signed and unsigned
|
||||
- u: unsigned integer
|
||||
- s: signed integer
|
||||
- f: float
|
||||
|
||||
## Scalars
|
||||
|
||||
Similar to vectors, but these describe a single concrete type,
|
||||
not a range. The number is the bitwidth. The optional
|
||||
`llvm_width` is the bitwidth of the integer that should be
|
||||
passed to LLVM (by truncating the Rust argument): this only
|
||||
works with scalar integers and the LLVM width must be smaller
|
||||
than the Rust width.
|
||||
|
||||
### Types
|
||||
|
||||
- U: unsigned integer
|
||||
- S: signed integer
|
||||
- F: float
|
||||
|
||||
## Aggregates
|
||||
|
||||
An aggregate is a collection of multiple types; a tuple in
|
||||
Rust terms, or an unnamed struct in LLVM. The `f` modifiers
|
||||
forces the tuple to be flattened in the LLVM
|
||||
intrinsic. E.g. if `llvm.foo` takes `(F32,S32)`:
|
||||
|
||||
- no `f` corresponds to `declare ... @llvm.foo({float, i32})`.
|
||||
- having an `f` corresponds to `declare ... @llvm.foo(float, i32)`.
|
||||
|
||||
The `[type;number]` form is a just shorter way to write
|
||||
`(...)`, except avoids doing a cartesian product of generic
|
||||
types, e.g. `[S32;2]` is the same as `(S32, S32)`, while
|
||||
`[I32;2]` is describing just the two types `(S32,S32)` and
|
||||
`(U32,U32)` (i.e. doesn't include `(S32,U32)`, `(U32,S32)` as
|
||||
`(I32,I32)` would).
|
||||
|
||||
(Currently aggregates can not contain other aggregates.)
|
||||
|
||||
## References
|
||||
|
||||
A reference uses the type of another argument, with possible
|
||||
modifications. The number refers to the type to use, starting
|
||||
with 0 == return value, 1 == first argument, 2 == second
|
||||
argument, etc.
|
||||
|
||||
## Affixes
|
||||
|
||||
The `modifier` and `suffix` adaptors change the precise
|
||||
representation.
|
||||
|
||||
### Modifiers
|
||||
|
||||
- 'v': put a scalar into a vector of the current width (u32 -> u32x4, when width == 128)
|
||||
- 'S': get the scalar element of a vector (u32x4 -> u32)
|
||||
- 'h': half the length of the vector (u32x4 -> u32x2)
|
||||
- 'd': double the length of the vector (u32x2 -> u32x4)
|
||||
- 'n': narrow the element of the vector (u32x4 -> u16x4)
|
||||
- 'w': widen the element of the vector (u16x4 -> u32x4)
|
||||
- 'N': half the length of the vector element (u32x4 -> u16x8)
|
||||
- 'W': double the length of the vector element (u16x8 -> u32x4)
|
||||
- 'u': force a number (vector or scalar) to be unsigned int (f32x4 -> u32x4)
|
||||
- 's': force a number (vector or scalar) to be signed int (u32x4 -> i32x4)
|
||||
- 'f': force a number (vector or scalar) to be float (u32x4 -> f32x4)
|
||||
- 'x' number: force the type to be a vector of bitwidth `number`.
|
||||
- '.' number: get the `number`th element of an aggregate
|
||||
- 'D': dereference a pointer (*mut u32 -> u32)
|
||||
- 'C': make a pointer const (*mut u32 -> *const u32)
|
||||
- 'M': make a pointer mut (*const u32 -> *mut u32)
|
||||
|
||||
### Pointers
|
||||
|
||||
Pointers can be created of any type by appending a `P*`
|
||||
suffix. The `m` vs. `c` chooses mut vs. const. e.g. `S32Pm`
|
||||
corresponds to `*mut i32`, and `i32Pc` corresponds (with width
|
||||
128) to `*const i8x16`, `*const u32x4`, etc.
|
||||
|
||||
The type after the `/` (optional) represents the type used
|
||||
internally to LLVM, e.g. `S32pm/S8` is exposed as `*mut i32`
|
||||
in Rust, but is `i8*` in LLVM. (This defaults to the main
|
||||
type).
|
||||
|
||||
### Bitcast
|
||||
|
||||
The `'->' type` bitcast suffix will cause the value to be
|
||||
bitcast to the right-hand type when calling the intrinsic,
|
||||
e.g. `s32->f32` will expose the intrinsic as `i32x4` at the
|
||||
Rust level, but will cast that vector to `f32x4` when calling
|
||||
the LLVM intrinsic.
|
||||
'''))
|
||||
parser.add_argument('--format', choices=FORMATS, required=True,
|
||||
help = 'Output format.')
|
||||
parser.add_argument('-o', '--out', type=argparse.FileType('w'), default=sys.stdout,
|
||||
help = 'File to output to (default stdout).')
|
||||
parser.add_argument('-i', '--info', type=argparse.FileType('r'),
|
||||
help = 'File containing platform specific information to merge into '
|
||||
'the input files\' header.')
|
||||
parser.add_argument('in_', metavar="FILE", type=argparse.FileType('r'), nargs='+',
|
||||
help = 'JSON files to load')
|
||||
return parser.parse_args()
|
||||
|
||||
|
||||
class ExternBlock(object):
|
||||
def __init__(self):
|
||||
pass
|
||||
|
||||
@staticmethod
|
||||
def open(platform):
|
||||
return 'extern "platform-intrinsic" {'
|
||||
|
||||
@staticmethod
|
||||
def render(mono):
|
||||
return ' fn {}{}{};'.format(mono.platform_prefix(),
|
||||
mono.intrinsic_name(),
|
||||
mono.intrinsic_signature())
|
||||
|
||||
@staticmethod
|
||||
def close():
|
||||
return '}'
|
||||
|
||||
class CompilerDefs(object):
|
||||
def __init__(self):
|
||||
pass
|
||||
|
||||
@staticmethod
|
||||
def open(platform):
|
||||
return '''\
|
||||
// DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
|
||||
// ignore-tidy-linelength
|
||||
|
||||
#![allow(unused_imports)]
|
||||
|
||||
use {{Intrinsic, Type}};
|
||||
use IntrinsicDef::Named;
|
||||
|
||||
pub fn find(name: &str) -> Option<Intrinsic> {{
|
||||
if !name.starts_with("{0}") {{ return None }}
|
||||
Some(match &name["{0}".len()..] {{'''.format(platform.platform_prefix())
|
||||
|
||||
@staticmethod
|
||||
def render(mono):
|
||||
return '''\
|
||||
"{}" => Intrinsic {{
|
||||
inputs: {{ static INPUTS: [&'static Type; {}] = [{}]; &INPUTS }},
|
||||
output: {},
|
||||
definition: Named("{}")
|
||||
}},'''.format(mono.intrinsic_set_name() + mono.intrinsic_suffix(),
|
||||
len(mono._args_raw),
|
||||
mono.compiler_args(),
|
||||
mono.compiler_ret(),
|
||||
mono.llvm_name())
|
||||
|
||||
@staticmethod
|
||||
def close():
|
||||
return '''\
|
||||
_ => return None,
|
||||
})
|
||||
}'''
|
||||
|
||||
FORMATS = {
|
||||
'extern-block': ExternBlock(),
|
||||
'compiler-defs': CompilerDefs(),
|
||||
}
|
||||
|
||||
|
||||
def main():
|
||||
args = parse_args()
|
||||
ins = args.in_
|
||||
out = args.out
|
||||
out_format = FORMATS[args.format]
|
||||
info = args.info
|
||||
one_file_no_info = False
|
||||
if len(ins) > 1 and info is None:
|
||||
print('error: cannot have multiple inputs without an info header.', file=sys.stderr)
|
||||
sys.exit(1)
|
||||
|
||||
elif info is None:
|
||||
info = ins[0]
|
||||
one_file_no_info = True
|
||||
info_json = json.load(info)
|
||||
platform = PlatformInfo(info_json)
|
||||
|
||||
print(out_format.open(platform), file=out)
|
||||
|
||||
for in_ in ins:
|
||||
|
||||
if one_file_no_info:
|
||||
data = info_json
|
||||
else:
|
||||
data = json.load(in_)
|
||||
data.update(info_json)
|
||||
|
||||
intrinsics = IntrinsicSet(platform, data)
|
||||
for intr in intrinsics.intrinsics():
|
||||
for mono in intr.monomorphise():
|
||||
print(out_format.render(mono), file=out)
|
||||
|
||||
print(out_format.close(), file=out)
|
||||
|
||||
if __name__ == '__main__':
|
||||
main()
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,13 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_",
|
||||
"llvm_prefix": "llvm.cuda.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "syncthreads",
|
||||
"width": ["0"],
|
||||
"llvm": "syncthreads",
|
||||
"ret": "V",
|
||||
"args": []
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,7 +0,0 @@
|
|||
{
|
||||
"platform": "nvptx",
|
||||
"number_info": {
|
||||
"signed": {}
|
||||
},
|
||||
"width_info": {}
|
||||
}
|
||||
|
|
@ -1,90 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_",
|
||||
"llvm_prefix": "llvm.nvvm.read.ptx.sreg.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "block_dim_x",
|
||||
"width": ["0"],
|
||||
"llvm": "ntid.x",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "block_dim_y",
|
||||
"width": ["0"],
|
||||
"llvm": "ntid.y",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "block_dim_z",
|
||||
"width": ["0"],
|
||||
"llvm": "ntid.z",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "block_idx_x",
|
||||
"width": ["0"],
|
||||
"llvm": "ctaid.x",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "block_idx_y",
|
||||
"width": ["0"],
|
||||
"llvm": "ctaid.y",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "block_idx_z",
|
||||
"width": ["0"],
|
||||
"llvm": "ctaid.z",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "grid_dim_x",
|
||||
"width": ["0"],
|
||||
"llvm": "nctaid.x",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "grid_dim_y",
|
||||
"width": ["0"],
|
||||
"llvm": "nctaid.y",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "grid_dim_z",
|
||||
"width": ["0"],
|
||||
"llvm": "nctaid.z",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "thread_idx_x",
|
||||
"width": ["0"],
|
||||
"llvm": "tid.x",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "thread_idx_y",
|
||||
"width": ["0"],
|
||||
"llvm": "tid.y",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "thread_idx_z",
|
||||
"width": ["0"],
|
||||
"llvm": "tid.z",
|
||||
"ret": "S32",
|
||||
"args": []
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,294 +0,0 @@
|
|||
{
|
||||
"platform": "powerpc",
|
||||
"intrinsic_prefix": "_vec_",
|
||||
"llvm_prefix": "llvm.ppc.altivec.",
|
||||
"number_info": {
|
||||
"unsigned": {
|
||||
"kind" : "u",
|
||||
"data_type_short": { "8": "b", "16": "h", "32": "w", "64": "d" }
|
||||
},
|
||||
"signed": {
|
||||
"kind" : "s",
|
||||
"data_type_short": { "8": "b", "16": "h", "32": "w", "64": "d" }
|
||||
},
|
||||
"float": {}
|
||||
},
|
||||
"width_info": {
|
||||
"128": { "width": "" }
|
||||
},
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "perm",
|
||||
"width": [128],
|
||||
"llvm": "vperm",
|
||||
"ret": "s32",
|
||||
"args": ["0", "0", "s8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "mradds",
|
||||
"width": [128],
|
||||
"llvm": "vmhraddshs",
|
||||
"ret": "s16",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "cmpb",
|
||||
"width": [128],
|
||||
"llvm": "vcmpbfp",
|
||||
"ret": "s32",
|
||||
"args": ["f32", "f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "cmpeq{0.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vcmpequ{0.data_type_short}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "cmpgt{1.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vcmpgt{1.kind}{1.data_type_short}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0u", "1"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "cmpgt{1.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vcmpgt{1.kind}{1.data_type_short}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0", "1"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "max{0.kind}{0.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vmax{0.kind}{0.data_type_short}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "min{0.kind}{0.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vmin{0.kind}{0.data_type_short}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sub{0.kind}{0.data_type_short}s",
|
||||
"width": [128],
|
||||
"llvm": "vsub{0.kind}{0.data_type_short}s",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "subc",
|
||||
"width": [128],
|
||||
"llvm": "vsubcuw",
|
||||
"ret": "u32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "add{0.kind}{0.data_type_short}s",
|
||||
"width": [128],
|
||||
"llvm": "vadd{0.kind}{0.data_type_short}s",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "addc",
|
||||
"width": [128],
|
||||
"llvm": "vaddcuw",
|
||||
"ret": "u32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "mule{1.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vmule{0.kind}{1.data_type_short}",
|
||||
"ret": "i(16-32)",
|
||||
"args": ["0N", "1"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "mulo{1.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vmulo{0.kind}{1.data_type_short}",
|
||||
"ret": "i(16-32)",
|
||||
"args": ["0N", "1"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "avg{0.kind}{0.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vavg{0.kind}{0.data_type_short}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "packs{0.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vpk{0.kind}{1.data_type_short}{0.kind}s",
|
||||
"ret": "i(8-16)",
|
||||
"args": ["0W", "1"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "packsu{1.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vpk{1.kind}{1.data_type_short}{0.kind}s",
|
||||
"ret": "u(8-16)",
|
||||
"args": ["0Ws", "1"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "packpx",
|
||||
"width": [128],
|
||||
"llvm": "vpkpx",
|
||||
"ret": "s16",
|
||||
"args": ["s32", "s32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "unpackl{1.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vupkl{1.kind}{1.data_type_short}",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0N"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "unpackh{1.kind}{1.data_type_short}",
|
||||
"width": [128],
|
||||
"llvm": "vupkh{1.kind}{1.data_type_short}",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0N"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "madds",
|
||||
"width": [128],
|
||||
"llvm": "vmhaddshs",
|
||||
"ret": "s16",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "msumu{1.data_type_short}m",
|
||||
"width": [128],
|
||||
"llvm": "vmsumu{1.data_type_short}m",
|
||||
"ret": "u32",
|
||||
"args": ["u(8-16)", "1", "u32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "msummbm",
|
||||
"width": [128],
|
||||
"llvm": "vmsummbm",
|
||||
"ret": "s32",
|
||||
"args": ["s8", "u8", "s32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "msumshm",
|
||||
"width": [128],
|
||||
"llvm": "vmsumshm",
|
||||
"ret": "s32",
|
||||
"args": ["s16", "s16", "s32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "msum{0.kind}hs",
|
||||
"width": [128],
|
||||
"llvm": "vmsum{0.kind}hs",
|
||||
"ret": "i32",
|
||||
"args": ["0N", "0N", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sum2s",
|
||||
"width": [128],
|
||||
"llvm": "vsum2sws",
|
||||
"ret": "s32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sum4{0.kind}bs",
|
||||
"width": [128],
|
||||
"llvm": "vsum4{0.kind}bs",
|
||||
"ret": "i32",
|
||||
"args": ["0NN", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sum4shs",
|
||||
"width": [128],
|
||||
"llvm": "vsum4shs",
|
||||
"ret": "s32",
|
||||
"args": ["0N", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "sums",
|
||||
"width": [128],
|
||||
"llvm": "vsumsws",
|
||||
"ret": "s32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "madd",
|
||||
"width": [128],
|
||||
"llvm": "vmaddfp",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "nmsub",
|
||||
"width": [128],
|
||||
"llvm": "vnmsubfp",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "expte",
|
||||
"width": [128],
|
||||
"llvm": "vexptefp",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "floor",
|
||||
"width": [128],
|
||||
"llvm": "vrfim",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "ceil",
|
||||
"width": [128],
|
||||
"llvm": "vrfip",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "round",
|
||||
"width": [128],
|
||||
"llvm": "vrfin",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "trunc",
|
||||
"width": [128],
|
||||
"llvm": "vrfiz",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "loge",
|
||||
"width": [128],
|
||||
"llvm": "vlogefp",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "re",
|
||||
"width": [128],
|
||||
"llvm": "vrefp",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "rsqrte",
|
||||
"width": [128],
|
||||
"llvm": "vrsqrtefp",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,272 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.avx.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "256_addsub_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "addsub.{0.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_blendv_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "blendv.{0.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_broadcast_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "vbroadcastf128.{0.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["s8SPc"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cmp_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "cmp.{1.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "s8S"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvtepi32_pd",
|
||||
"width": [256],
|
||||
"llvm": "cvtdq2.pd.256",
|
||||
"ret": "f64",
|
||||
"args": ["s32h"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvtepi32_ps",
|
||||
"width": [256],
|
||||
"llvm": "cvtdq2.ps.256",
|
||||
"ret": "f32",
|
||||
"args": ["s32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvtpd_epi32",
|
||||
"width": [256],
|
||||
"llvm": "cvt.pd2dq.256",
|
||||
"ret": "s32h",
|
||||
"args": ["f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvtpd_ps",
|
||||
"width": [256],
|
||||
"llvm": "cvt.pd2.ps.256",
|
||||
"ret": "f32h",
|
||||
"args": ["f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvtps_epi32",
|
||||
"width": [256],
|
||||
"llvm": "cvt.ps2dq.256",
|
||||
"ret": "s32",
|
||||
"args": ["f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvtps_pd",
|
||||
"width": [256],
|
||||
"llvm": "cvt.ps2.pd.256",
|
||||
"ret": "f64",
|
||||
"args": ["f32h"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvttpd_epi32",
|
||||
"width": [256],
|
||||
"llvm": "cvtt.pd2dq.256",
|
||||
"ret": "s32h",
|
||||
"args": ["f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_cvttps_epi32",
|
||||
"width": [256],
|
||||
"llvm": "cvtt.ps2dq.256",
|
||||
"ret": "s32",
|
||||
"args": ["f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_dp_ps",
|
||||
"width": [256],
|
||||
"llvm": "dp.ps.256",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_hadd_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "hadd.{0.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_hsub_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "hsub.{0.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_max_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "max.{0.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_maskload_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "maskload.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": ["f(32-64)"],
|
||||
"args": ["0SPc/S8", "0s->0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{3.width_mm}_maskstore_{3.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "maskstore.{3.data_type_short}{3.width_suffix}",
|
||||
"ret": "V",
|
||||
"args": ["F(32-64)Pm/S8", "1Dsv->1Dv", "1Dv"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_min_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "min.{0.data_type}.256",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_movemask_ps",
|
||||
"width": [256],
|
||||
"llvm": "movmsk.ps.256",
|
||||
"ret": "S32",
|
||||
"args": ["f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_movemask_pd",
|
||||
"width": [256],
|
||||
"llvm": "movmsk.pd.256",
|
||||
"ret": "S32",
|
||||
"args": ["f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_permutevar_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "vpermilvar.{0.data_type}{0.width_suffix}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0s"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_rcp_ps",
|
||||
"width": [256],
|
||||
"llvm": "rcp.ps.256",
|
||||
"ret": "f32",
|
||||
"args": ["f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_rsqrt_ps",
|
||||
"width": [256],
|
||||
"llvm": "rsqrt.ps.256",
|
||||
"ret": "f32",
|
||||
"args": ["f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_storeu_{2.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "storeu.ps.256",
|
||||
"ret": "V",
|
||||
"args": ["f(32-64)Pm/U8", "1D"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_storeu_si256",
|
||||
"width": [256],
|
||||
"llvm": "storeu.dq.256",
|
||||
"ret": "V",
|
||||
"args": ["u8Pm/U8", "1D"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_sqrt_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "!llvm.sqrt.{0.llvm_name}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{1.width_mm}_testc_ps",
|
||||
"width": [128, 256],
|
||||
"llvm": "vtestc.ps{1.width_suffix}",
|
||||
"ret": "S32",
|
||||
"args": ["f32", "f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{1.width_mm}_testc_pd",
|
||||
"width": [128, 256],
|
||||
"llvm": "vtestc.pd{1.width_suffix}",
|
||||
"ret": "S32",
|
||||
"args": ["f64", "f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_testc_si256",
|
||||
"width": [256],
|
||||
"llvm": "ptestc.256",
|
||||
"ret": "S32",
|
||||
"args": ["u64", "u64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{1.width_mm}_testnzc_ps",
|
||||
"width": [128, 256],
|
||||
"llvm": "vtestnzc.ps{1.width_suffix}",
|
||||
"ret": "S32",
|
||||
"args": ["f32", "f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{1.width_mm}_testnzc_pd",
|
||||
"width": [128, 256],
|
||||
"llvm": "vtestnzc.pd{1.width_suffix}",
|
||||
"ret": "S32",
|
||||
"args": ["f64", "f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_testnzc_si256",
|
||||
"width": [256],
|
||||
"llvm": "ptestnzc.256",
|
||||
"ret": "S32",
|
||||
"args": ["u64", "u64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{1.width_mm}_testz_ps",
|
||||
"width": [128, 256],
|
||||
"llvm": "vtestz.ps{1.width_suffix}",
|
||||
"ret": "S32",
|
||||
"args": ["f32", "f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{1.width_mm}_testz_pd",
|
||||
"width": [128, 256],
|
||||
"llvm": "vtestz.pd{1.width_suffix}",
|
||||
"ret": "S32",
|
||||
"args": ["f64", "f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_testz_si256",
|
||||
"width": [256],
|
||||
"llvm": "ptestz.256",
|
||||
"ret": "S32",
|
||||
"args": ["u64", "u64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_zeroall",
|
||||
"width": [256],
|
||||
"llvm": "vzeroall",
|
||||
"ret": "V",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_zeroupper",
|
||||
"width": [256],
|
||||
"llvm": "vzeroupper",
|
||||
"ret": "V",
|
||||
"args": []
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,202 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.avx2.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "256_abs_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "pabs.{0.data_type_short}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_adds_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "padd{0.kind_short}s.{0.data_type_short}",
|
||||
"ret": "i(8-16)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_avg_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "pavg.{0.data_type_short}",
|
||||
"ret": "u(8-16)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_hadd_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "phadd.{0.data_type_short}",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_hadds_epi16",
|
||||
"width": [256],
|
||||
"llvm": "phadd.sw",
|
||||
"ret": "s16",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_hsub_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "phsub.{0.data_type_short}",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_hsubs_epi16",
|
||||
"width": [256],
|
||||
"llvm": "phsub.sw",
|
||||
"ret": "s16",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_madd_epi16",
|
||||
"width": [256],
|
||||
"llvm": "pmadd.wd",
|
||||
"ret": "s32",
|
||||
"args": ["s16", "s16"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_maddubs_epi16",
|
||||
"width": [256],
|
||||
"llvm": "pmadd.ub.sw",
|
||||
"ret": "s16",
|
||||
"args": ["s8", "s8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_mask_i32gather_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "gather.d.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": ["s32", "f32"],
|
||||
"args": ["0", "0SPc/S8", "s32", "0s->0", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_mask_i32gather_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "gather.d.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": ["s64", "f64"],
|
||||
"args": ["0", "0SPc/S8", "s32x128", "0s->0", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{3.width_mm}_mask_i64gather_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "gather.q.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": ["s32x128", "f32x128"],
|
||||
"args": ["0", "0SPc/S8", "s64", "0s->0", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_mask_i64gather_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "gather.q.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": ["s64", "f64"],
|
||||
"args": ["0", "0SPc/S8", "s64", "0s->0", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_maskload_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "maskload.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": ["s(32-64)"],
|
||||
"args": ["0Pc/S8", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{2.width_mm}_maskstore_{2.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "maskstore.{2.data_type_short}{2.width_suffix}",
|
||||
"ret": "V",
|
||||
"args": ["S(32-64)Pm/S8", "1Dv", "2"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_max_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "pmax{0.kind}.{0.data_type_short}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_min_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "pmin{0.kind}.{0.data_type_short}",
|
||||
"ret": "i(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_movemask_epi8",
|
||||
"width": [256],
|
||||
"llvm": "pmovmskb",
|
||||
"ret": "S32",
|
||||
"args": ["s8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_mpsadbw_epu8",
|
||||
"width": [256],
|
||||
"llvm": "mpsadbw",
|
||||
"ret": "u16",
|
||||
"args": ["u8", "u8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_mul_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "pmul{0.data_type_short}.dq",
|
||||
"ret": "i64",
|
||||
"args": ["0dn", "0dn"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_mulhi_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "pmulh{0.data_type_short}.w",
|
||||
"ret": "i16",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_mulhrs_epi16",
|
||||
"width": [256],
|
||||
"llvm": "pmul.hr.sw",
|
||||
"ret": "s16",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_pack{0.kind_short}s_{1.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "pack{0.kind}s{1.data_type_short}{0.data_type_short}",
|
||||
"ret": "i(8-16)",
|
||||
"args": ["0hws", "0hws"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_permutevar8x32_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "perm{0.data_type_short}",
|
||||
"ret": ["s32", "f32"],
|
||||
"args": ["0", "0s"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_sad_epu8",
|
||||
"width": [256],
|
||||
"llvm": "psad.bw",
|
||||
"ret": "u64",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_shuffle_epi8",
|
||||
"width": [256],
|
||||
"llvm": "pshuf.b",
|
||||
"ret": "s8",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_sign_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "psign.{0.data_type_short}",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "256_subs_{0.data_type}",
|
||||
"width": [256],
|
||||
"llvm": "psub{0.kind_short}s.{0.data_type_short}",
|
||||
"ret": "i(8-16)",
|
||||
"args": ["0", "0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_bmi",
|
||||
"llvm_prefix": "llvm.x86.bmi.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_bextr_{0.bitwidth}",
|
||||
"width": ["0"],
|
||||
"llvm": "bextr.{0.bitwidth}",
|
||||
"ret": "S(32-64)u",
|
||||
"args": ["0", "0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_bmi2",
|
||||
"llvm_prefix": "llvm.x86.bmi.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_bzhi_{0.bitwidth}",
|
||||
"width": ["0"],
|
||||
"llvm": "bzhi.{0.bitwidth}",
|
||||
"ret": "S(32-64)u",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_pdep_{0.bitwidth}",
|
||||
"width": ["0"],
|
||||
"llvm": "pdep.{0.bitwidth}",
|
||||
"ret": "S(32-64)u",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_pext_{0.bitwidth}",
|
||||
"width": ["0"],
|
||||
"llvm": "pext.{0.bitwidth}",
|
||||
"ret": "S(32-64)u",
|
||||
"args": ["0", "0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,48 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.fma.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_fmadd_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "vfmadd.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_fmaddsub_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "vfmaddsub.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_fmsub_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "vfmsub.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_fmsubadd_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "vfmsubadd.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_fnmadd_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "vfnmadd.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "{0.width_mm}_fnmsub_{0.data_type}",
|
||||
"width": [128, 256],
|
||||
"llvm": "vfnmsub.{0.data_type_short}{0.width_suffix}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,32 +0,0 @@
|
|||
{
|
||||
"platform": "x86",
|
||||
"number_info": {
|
||||
"signed": {
|
||||
"kind": "s",
|
||||
"kind_short": "",
|
||||
"data_type": { "pattern": "epi{bitwidth}" },
|
||||
"bitwidth": { "pattern": "{bitwidth}" },
|
||||
"data_type_short": { "8": "b", "16": "w", "32": "d", "64": "q" }
|
||||
},
|
||||
"unsigned": {
|
||||
"kind": "u",
|
||||
"kind_short": "u",
|
||||
"data_type": { "pattern": "epu{bitwidth}" },
|
||||
"bitwidth": { "pattern": "{bitwidth}" },
|
||||
"data_type_short": { "8": "b", "16": "w", "32": "d", "64": "q" }
|
||||
},
|
||||
"float": {
|
||||
"kind": "f",
|
||||
"data_type": { "32": "ps", "64": "pd" },
|
||||
"bitwidth": { "pattern": "{bitwidth}" },
|
||||
"data_type_short": { "32": "ps", "64": "pd" }
|
||||
}
|
||||
},
|
||||
"width_info": {
|
||||
"32": { "width_mm": "32", "width_suffix": "" },
|
||||
"64": { "width_mm": "64", "width_suffix": "" },
|
||||
"128": { "width_mm": "", "width_suffix": "" },
|
||||
"256": { "width_mm": "256", "width_suffix": ".256" },
|
||||
"512": { "width_mm": "512", "width_suffix": ".512" }
|
||||
}
|
||||
}
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_rdrand",
|
||||
"llvm_prefix": "llvm.x86.rdrand.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "16_step",
|
||||
"width": ["0"],
|
||||
"llvm": "16",
|
||||
"ret": "(U16,S32)",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "32_step",
|
||||
"width": ["0"],
|
||||
"llvm": "32",
|
||||
"ret": "(U32,S32)",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "64_step",
|
||||
"width": ["0"],
|
||||
"llvm": "64",
|
||||
"ret": "(U64,S32)",
|
||||
"args": []
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_rdseed",
|
||||
"llvm_prefix": "llvm.x86.rdseed.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "16_step",
|
||||
"width": ["0"],
|
||||
"llvm": "16",
|
||||
"ret": "(U16,S32)",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "32_step",
|
||||
"width": ["0"],
|
||||
"llvm": "32",
|
||||
"ret": "(U32,S32)",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "64_step",
|
||||
"width": ["0"],
|
||||
"llvm": "64",
|
||||
"ret": "(U64,S32)",
|
||||
"args": []
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.sse.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_movemask_ps",
|
||||
"width": [128],
|
||||
"llvm": "movmsk.ps",
|
||||
"ret": "S32",
|
||||
"args": ["f32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_max_ps",
|
||||
"width": [128],
|
||||
"llvm": "max.ps",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_min_ps",
|
||||
"width": [128],
|
||||
"llvm": "min.ps",
|
||||
"ret": "f32",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_rsqrt_ps",
|
||||
"width": [128],
|
||||
"llvm": "rsqrt.ps",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_rcp_ps",
|
||||
"width": [128],
|
||||
"llvm": "rcp.ps",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_sqrt_ps",
|
||||
"width": [128],
|
||||
"llvm": "!llvm.sqrt.v4f32",
|
||||
"ret": "f32",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_storeu_ps",
|
||||
"width": [128],
|
||||
"llvm": "storeu.ps",
|
||||
"ret": "V",
|
||||
"args": ["F32Pm/S8", "f32"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,160 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.sse2.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_adds_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "padd{0.kind_short}s.{0.data_type_short}",
|
||||
"ret": "i(8-16)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_avg_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "pavg.{0.data_type_short}",
|
||||
"ret": "u(8-16)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_lfence",
|
||||
"width": [128],
|
||||
"llvm": "lfence",
|
||||
"ret": "V",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "_madd_epi16",
|
||||
"width": [128],
|
||||
"llvm": "pmadd.wd",
|
||||
"ret": "s32",
|
||||
"args": ["s16", "s16"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_maskmoveu_si128",
|
||||
"width": [128],
|
||||
"llvm": "maskmov.dqu",
|
||||
"ret": "V",
|
||||
"args": ["u8", "u8", "U8Pm"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_max_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "pmax{0.kind}.{0.data_type_short}",
|
||||
"ret": ["s16", "u8"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_max_pd",
|
||||
"width": [128],
|
||||
"llvm": "max.pd",
|
||||
"ret": "f64",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_mfence",
|
||||
"width": [128],
|
||||
"llvm": "fence",
|
||||
"ret": "V",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "_min_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "pmin{0.kind}.{0.data_type_short}",
|
||||
"ret": ["s16", "u8"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_min_pd",
|
||||
"width": [128],
|
||||
"llvm": "min.pd",
|
||||
"ret": "f64",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_movemask_pd",
|
||||
"width": [128],
|
||||
"llvm": "movmsk.pd",
|
||||
"ret": "S32",
|
||||
"args": ["f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_movemask_epi8",
|
||||
"width": [128],
|
||||
"llvm": "pmovmskb.128",
|
||||
"ret": "S32",
|
||||
"args": ["s8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_mul_epu32",
|
||||
"width": [128],
|
||||
"llvm": "pmulu.dq",
|
||||
"ret": "u64",
|
||||
"args": ["0dn", "0dn"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_mulhi_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "pmulh{0.kind_short}.w",
|
||||
"ret": "i16",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_packs_{1.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "packss{1.data_type_short}{0.data_type_short}.128",
|
||||
"ret": "s(8-16)",
|
||||
"args": ["0hw", "0hw"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_packus_epi16",
|
||||
"width": [128],
|
||||
"llvm": "packuswb.128",
|
||||
"ret": "u8",
|
||||
"args": ["s16", "s16"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_sad_epu8",
|
||||
"width": [128],
|
||||
"llvm": "psad.bw",
|
||||
"ret": "u64",
|
||||
"args": ["u8", "u8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_sfence",
|
||||
"width": [128],
|
||||
"llvm": "sfence",
|
||||
"ret": "V",
|
||||
"args": []
|
||||
},
|
||||
{
|
||||
"intrinsic": "_sqrt_pd",
|
||||
"width": [128],
|
||||
"llvm": "!llvm.sqrt.v2f64",
|
||||
"ret": "f64",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_storeu_pd",
|
||||
"width": [128],
|
||||
"llvm": "storeu.pd",
|
||||
"ret": "V",
|
||||
"args": ["F64Pm/U8", "f64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_storeu_si128",
|
||||
"width": [128],
|
||||
"llvm": "storeu.dq",
|
||||
"ret": "V",
|
||||
"args": ["u8Pm/U8", "u8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_subs_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "psub{0.kind_short}s.{0.data_type_short}",
|
||||
"ret": "i(8-16)",
|
||||
"args": ["0", "0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,34 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.sse3.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_addsub_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "addsub.{0.data_type}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_hadd_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "hadd.{0.data_type}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_hsub_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "hsub.{0.data_type}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_lddqu_si128",
|
||||
"width": [128],
|
||||
"llvm": "ldu.dq",
|
||||
"ret": "u8",
|
||||
"args": ["0Pc/S8"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,76 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.sse41.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_dp_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "dp{0.data_type}",
|
||||
"ret": "f(32-64)",
|
||||
"args": ["0", "0", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_max_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "pmax{0.kind}{0.data_type_short}",
|
||||
"ret": ["s8", "u16", "i32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_min_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "pmin{0.kind}{0.data_type_short}",
|
||||
"ret": ["s8", "u16", "i32"],
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_minpos_epu16",
|
||||
"width": [128],
|
||||
"llvm": "phminposuw",
|
||||
"ret": "u16",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_mpsadbw_epu8",
|
||||
"width": [128],
|
||||
"llvm": "mpsadbw",
|
||||
"ret": "u16",
|
||||
"args": ["u8", "u8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_mul_epi32",
|
||||
"width": [128],
|
||||
"llvm": "pmuldq",
|
||||
"ret": "s64",
|
||||
"args": ["s32", "s32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_packus_epi32",
|
||||
"width": [128],
|
||||
"llvm": "packusdw",
|
||||
"ret": "u16",
|
||||
"args": ["s32", "s32"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_testc_si128",
|
||||
"width": [128],
|
||||
"llvm": "ptestc",
|
||||
"ret": "S32",
|
||||
"args": ["u64", "u64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_testnzc_si128",
|
||||
"width": [128],
|
||||
"llvm": "ptestnzc",
|
||||
"ret": "S32",
|
||||
"args": ["u64", "u64"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_testz_si128",
|
||||
"width": [128],
|
||||
"llvm": "ptestz",
|
||||
"ret": "S32",
|
||||
"args": ["u64", "u64"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,104 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.sse42.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_cmpestra",
|
||||
"width": [128],
|
||||
"llvm": "pcmpestria128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "S32", "s8", "S32", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpestrc",
|
||||
"width": [128],
|
||||
"llvm": "pcmpestric128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "S32", "s8", "S32", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpestri",
|
||||
"width": [128],
|
||||
"llvm": "pcmpestri128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "S32", "s8", "S32", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpestrm",
|
||||
"width": [128],
|
||||
"llvm": "pcmpestrm128",
|
||||
"ret": "s8",
|
||||
"args": ["s8", "S32", "s8", "S32", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpestro",
|
||||
"width": [128],
|
||||
"llvm": "pcmpestrio128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "S32", "s8", "S32", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpestrs",
|
||||
"width": [128],
|
||||
"llvm": "pcmpestris128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "S32", "s8", "S32", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpestrz",
|
||||
"width": [128],
|
||||
"llvm": "pcmpestriz128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "S32", "s8", "S32", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpistra",
|
||||
"width": [128],
|
||||
"llvm": "pcmpistria128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "s8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpistrc",
|
||||
"width": [128],
|
||||
"llvm": "pcmpistric128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "s8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpistri",
|
||||
"width": [128],
|
||||
"llvm": "pcmpistri128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "s8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpistrm",
|
||||
"width": [128],
|
||||
"llvm": "pcmpistrm128",
|
||||
"ret": "s8",
|
||||
"args": ["s8", "s8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpistro",
|
||||
"width": [128],
|
||||
"llvm": "pcmpistrio128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "s8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpistrs",
|
||||
"width": [128],
|
||||
"llvm": "pcmpistris128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "s8", "S32/8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_cmpistrz",
|
||||
"width": [128],
|
||||
"llvm": "pcmpistriz128",
|
||||
"ret": "S32",
|
||||
"args": ["s8", "s8", "S32/8"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,69 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_mm",
|
||||
"llvm_prefix": "llvm.x86.ssse3.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_abs_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "pabs.{0.data_type_short}.128",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_hadd_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "phadd.{0.data_type_short}.128",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_hadds_epi16",
|
||||
"width": [128],
|
||||
"llvm": "phadd.sw.128",
|
||||
"ret": "s16",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_hsub_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "phsub.{0.data_type_short}.128",
|
||||
"ret": "s(16-32)",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_hsubs_epi16",
|
||||
"width": [128],
|
||||
"llvm": "phsub.sw.128",
|
||||
"ret": "s16",
|
||||
"args": ["0", "0"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_maddubs_epi16",
|
||||
"width": [128],
|
||||
"llvm": "pmadd.ub.sw.128",
|
||||
"ret": "s16",
|
||||
"args": ["u8", "s8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_mulhrs_epi16",
|
||||
"width": [128],
|
||||
"llvm": "pmul.hr.sw.128",
|
||||
"ret": "s16",
|
||||
"args": ["s16", "s16"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_shuffle_epi8",
|
||||
"width": [128],
|
||||
"llvm": "pshuf.b.128",
|
||||
"ret": "s8",
|
||||
"args": ["s8", "s8"]
|
||||
},
|
||||
{
|
||||
"intrinsic": "_sign_{0.data_type}",
|
||||
"width": [128],
|
||||
"llvm": "psign.{0.data_type_short}.128",
|
||||
"ret": "s(8-32)",
|
||||
"args": ["0", "0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
{
|
||||
"intrinsic_prefix": "_tbm",
|
||||
"llvm_prefix": "llvm.x86.tbm.",
|
||||
"intrinsics": [
|
||||
{
|
||||
"intrinsic": "_bextri_u{0.bitwidth}",
|
||||
"width": ["0"],
|
||||
"llvm": "bextri.u{0.bitwidth}",
|
||||
"ret": "S(32-64)u",
|
||||
"args": ["0", "0"]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,7 +1,6 @@
|
|||
#![allow(non_upper_case_globals)]
|
||||
|
||||
use attributes;
|
||||
use intrinsics::{self, Intrinsic};
|
||||
use llvm;
|
||||
use llvm_util;
|
||||
use abi::{Abi, FnType, LlvmType, PassMode};
|
||||
|
|
@ -658,142 +657,7 @@ impl IntrinsicCallMethods<'tcx> for Builder<'a, 'll, 'tcx> {
|
|||
return;
|
||||
}
|
||||
|
||||
_ => {
|
||||
let intr = match Intrinsic::find(&name) {
|
||||
Some(intr) => intr,
|
||||
None => bug!("unknown intrinsic '{}'", name),
|
||||
};
|
||||
fn one<T>(x: Vec<T>) -> T {
|
||||
assert_eq!(x.len(), 1);
|
||||
x.into_iter().next().unwrap()
|
||||
}
|
||||
fn ty_to_type<'ll>(
|
||||
cx: &CodegenCx<'ll, '_>,
|
||||
t: &intrinsics::Type
|
||||
) -> Vec<&'ll Type> {
|
||||
use intrinsics::Type::*;
|
||||
match *t {
|
||||
Void => vec![cx.type_void()],
|
||||
Integer(_signed, _width, llvm_width) => {
|
||||
vec![cx.type_ix( llvm_width as u64)]
|
||||
}
|
||||
Float(x) => {
|
||||
match x {
|
||||
32 => vec![cx.type_f32()],
|
||||
64 => vec![cx.type_f64()],
|
||||
_ => bug!()
|
||||
}
|
||||
}
|
||||
Pointer(ref t, ref llvm_elem, _const) => {
|
||||
let t = llvm_elem.as_ref().unwrap_or(t);
|
||||
let elem = one(ty_to_type(cx, t));
|
||||
vec![cx.type_ptr_to(elem)]
|
||||
}
|
||||
Vector(ref t, ref llvm_elem, length) => {
|
||||
let t = llvm_elem.as_ref().unwrap_or(t);
|
||||
let elem = one(ty_to_type(cx, t));
|
||||
vec![cx.type_vector(elem, length as u64)]
|
||||
}
|
||||
Aggregate(false, ref contents) => {
|
||||
let elems = contents.iter()
|
||||
.map(|t| one(ty_to_type(cx, t)))
|
||||
.collect::<Vec<_>>();
|
||||
vec![cx.type_struct( &elems, false)]
|
||||
}
|
||||
Aggregate(true, ref contents) => {
|
||||
contents.iter()
|
||||
.flat_map(|t| ty_to_type(cx, t))
|
||||
.collect()
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// This allows an argument list like `foo, (bar, baz),
|
||||
// qux` to be converted into `foo, bar, baz, qux`, integer
|
||||
// arguments to be truncated as needed and pointers to be
|
||||
// cast.
|
||||
fn modify_as_needed<'ll, 'tcx>(
|
||||
bx: &mut Builder<'_, 'll, 'tcx>,
|
||||
t: &intrinsics::Type,
|
||||
arg: &OperandRef<'tcx, &'ll Value>,
|
||||
) -> Vec<&'ll Value> {
|
||||
match *t {
|
||||
intrinsics::Type::Aggregate(true, ref contents) => {
|
||||
// We found a tuple that needs squishing! So
|
||||
// run over the tuple and load each field.
|
||||
//
|
||||
// This assumes the type is "simple", i.e., no
|
||||
// destructors, and the contents are SIMD
|
||||
// etc.
|
||||
assert!(!bx.type_needs_drop(arg.layout.ty));
|
||||
let (ptr, align) = match arg.val {
|
||||
OperandValue::Ref(ptr, None, align) => (ptr, align),
|
||||
_ => bug!()
|
||||
};
|
||||
let arg = PlaceRef::new_sized(ptr, arg.layout, align);
|
||||
(0..contents.len()).map(|i| {
|
||||
let field = arg.project_field(bx, i);
|
||||
bx.load_operand(field).immediate()
|
||||
}).collect()
|
||||
}
|
||||
intrinsics::Type::Pointer(_, Some(ref llvm_elem), _) => {
|
||||
let llvm_elem = one(ty_to_type(bx, llvm_elem));
|
||||
vec![bx.pointercast(arg.immediate(), bx.type_ptr_to(llvm_elem))]
|
||||
}
|
||||
intrinsics::Type::Vector(_, Some(ref llvm_elem), length) => {
|
||||
let llvm_elem = one(ty_to_type(bx, llvm_elem));
|
||||
vec![
|
||||
bx.bitcast(arg.immediate(),
|
||||
bx.type_vector(llvm_elem, length as u64))
|
||||
]
|
||||
}
|
||||
intrinsics::Type::Integer(_, width, llvm_width) if width != llvm_width => {
|
||||
// the LLVM intrinsic uses a smaller integer
|
||||
// size than the C intrinsic's signature, so
|
||||
// we have to trim it down here.
|
||||
vec![bx.trunc(arg.immediate(), bx.type_ix(llvm_width as u64))]
|
||||
}
|
||||
_ => vec![arg.immediate()],
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
let inputs = intr.inputs.iter()
|
||||
.flat_map(|t| ty_to_type(self, t))
|
||||
.collect::<Vec<_>>();
|
||||
|
||||
let outputs = one(ty_to_type(self, &intr.output));
|
||||
|
||||
let llargs: Vec<_> = intr.inputs.iter().zip(args).flat_map(|(t, arg)| {
|
||||
modify_as_needed(self, t, arg)
|
||||
}).collect();
|
||||
assert_eq!(inputs.len(), llargs.len());
|
||||
|
||||
let val = match intr.definition {
|
||||
intrinsics::IntrinsicDef::Named(name) => {
|
||||
let f = self.declare_cfn(
|
||||
name,
|
||||
self.type_func(&inputs, outputs),
|
||||
);
|
||||
self.call(f, &llargs, None)
|
||||
}
|
||||
};
|
||||
|
||||
match *intr.output {
|
||||
intrinsics::Type::Aggregate(flatten, ref elems) => {
|
||||
// the output is a tuple so we need to munge it properly
|
||||
assert!(!flatten);
|
||||
|
||||
for i in 0..elems.len() {
|
||||
let dest = result.project_field(self, i);
|
||||
let val = self.extract_value(val, i as u64);
|
||||
self.store(val, dest.llval, dest.align);
|
||||
}
|
||||
return;
|
||||
}
|
||||
_ => val,
|
||||
}
|
||||
}
|
||||
_ => bug!("unknown intrinsic '{}'", name),
|
||||
};
|
||||
|
||||
if !fn_ty.ret.is_ignore() {
|
||||
|
|
|
|||
|
|
@ -43,7 +43,6 @@ extern crate rustc_target;
|
|||
extern crate rustc_demangle;
|
||||
extern crate rustc_incremental;
|
||||
extern crate rustc_llvm;
|
||||
extern crate rustc_platform_intrinsics as intrinsics;
|
||||
extern crate rustc_codegen_utils;
|
||||
extern crate rustc_codegen_ssa;
|
||||
extern crate rustc_fs_util;
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
[package]
|
||||
authors = ["The Rust Project Developers"]
|
||||
name = "rustc_platform_intrinsics"
|
||||
version = "0.0.0"
|
||||
|
||||
[lib]
|
||||
name = "rustc_platform_intrinsics"
|
||||
path = "lib.rs"
|
||||
crate-type = ["dylib"]
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,124 +0,0 @@
|
|||
#![allow(nonstandard_style)]
|
||||
|
||||
#![feature(nll)]
|
||||
|
||||
pub struct Intrinsic {
|
||||
pub inputs: &'static [&'static Type],
|
||||
pub output: &'static Type,
|
||||
|
||||
pub definition: IntrinsicDef,
|
||||
}
|
||||
|
||||
#[derive(Clone, Hash, Eq, PartialEq)]
|
||||
pub enum Type {
|
||||
Void,
|
||||
Integer(/* signed */ bool, u8, /* llvm width */ u8),
|
||||
Float(u8),
|
||||
Pointer(&'static Type, Option<&'static Type>, /* const */ bool),
|
||||
Vector(&'static Type, Option<&'static Type>, u16),
|
||||
Aggregate(bool, &'static [&'static Type]),
|
||||
}
|
||||
|
||||
pub enum IntrinsicDef {
|
||||
Named(&'static str),
|
||||
}
|
||||
|
||||
static I8: Type = Type::Integer(true, 8, 8);
|
||||
static I16: Type = Type::Integer(true, 16, 16);
|
||||
static I32: Type = Type::Integer(true, 32, 32);
|
||||
static I64: Type = Type::Integer(true, 64, 64);
|
||||
static U8: Type = Type::Integer(false, 8, 8);
|
||||
static U16: Type = Type::Integer(false, 16, 16);
|
||||
static U32: Type = Type::Integer(false, 32, 32);
|
||||
static U64: Type = Type::Integer(false, 64, 64);
|
||||
static F32: Type = Type::Float(32);
|
||||
static F64: Type = Type::Float(64);
|
||||
|
||||
static I32_8: Type = Type::Integer(true, 32, 8);
|
||||
|
||||
static I8x8: Type = Type::Vector(&I8, None, 8);
|
||||
static U8x8: Type = Type::Vector(&U8, None, 8);
|
||||
static I8x16: Type = Type::Vector(&I8, None, 16);
|
||||
static U8x16: Type = Type::Vector(&U8, None, 16);
|
||||
static I8x32: Type = Type::Vector(&I8, None, 32);
|
||||
static U8x32: Type = Type::Vector(&U8, None, 32);
|
||||
static I8x64: Type = Type::Vector(&I8, None, 64);
|
||||
static U8x64: Type = Type::Vector(&U8, None, 64);
|
||||
static I8x128: Type = Type::Vector(&I8, None, 128);
|
||||
static U8x128: Type = Type::Vector(&U8, None, 128);
|
||||
static I8x256: Type = Type::Vector(&I8, None, 256);
|
||||
static U8x256: Type = Type::Vector(&U8, None, 256);
|
||||
|
||||
static I16x4: Type = Type::Vector(&I16, None, 4);
|
||||
static U16x4: Type = Type::Vector(&U16, None, 4);
|
||||
static I16x8: Type = Type::Vector(&I16, None, 8);
|
||||
static U16x8: Type = Type::Vector(&U16, None, 8);
|
||||
static I16x16: Type = Type::Vector(&I16, None, 16);
|
||||
static U16x16: Type = Type::Vector(&U16, None, 16);
|
||||
static I16x32: Type = Type::Vector(&I16, None, 32);
|
||||
static U16x32: Type = Type::Vector(&U16, None, 32);
|
||||
static I16x64: Type = Type::Vector(&I16, None, 64);
|
||||
static U16x64: Type = Type::Vector(&U16, None, 64);
|
||||
static I16x128: Type = Type::Vector(&I16, None, 128);
|
||||
static U16x128: Type = Type::Vector(&U16, None, 128);
|
||||
|
||||
static I32x2: Type = Type::Vector(&I32, None, 2);
|
||||
static U32x2: Type = Type::Vector(&U32, None, 2);
|
||||
static I32x4: Type = Type::Vector(&I32, None, 4);
|
||||
static U32x4: Type = Type::Vector(&U32, None, 4);
|
||||
static I32x8: Type = Type::Vector(&I32, None, 8);
|
||||
static U32x8: Type = Type::Vector(&U32, None, 8);
|
||||
static I32x16: Type = Type::Vector(&I32, None, 16);
|
||||
static U32x16: Type = Type::Vector(&U32, None, 16);
|
||||
static I32x32: Type = Type::Vector(&I32, None, 32);
|
||||
static U32x32: Type = Type::Vector(&U32, None, 32);
|
||||
static I32x64: Type = Type::Vector(&I32, None, 64);
|
||||
static U32x64: Type = Type::Vector(&U32, None, 64);
|
||||
|
||||
static I64x1: Type = Type::Vector(&I64, None, 1);
|
||||
static U64x1: Type = Type::Vector(&U64, None, 1);
|
||||
static I64x2: Type = Type::Vector(&I64, None, 2);
|
||||
static U64x2: Type = Type::Vector(&U64, None, 2);
|
||||
static I64x4: Type = Type::Vector(&I64, None, 4);
|
||||
static U64x4: Type = Type::Vector(&U64, None, 4);
|
||||
|
||||
static F32x2: Type = Type::Vector(&F32, None, 2);
|
||||
static F32x4: Type = Type::Vector(&F32, None, 4);
|
||||
static F32x8: Type = Type::Vector(&F32, None, 8);
|
||||
static F64x1: Type = Type::Vector(&F64, None, 1);
|
||||
static F64x2: Type = Type::Vector(&F64, None, 2);
|
||||
static F64x4: Type = Type::Vector(&F64, None, 4);
|
||||
|
||||
static I32x4_F32: Type = Type::Vector(&I32, Some(&F32), 4);
|
||||
static I32x8_F32: Type = Type::Vector(&I32, Some(&F32), 8);
|
||||
static I64x2_F64: Type = Type::Vector(&I64, Some(&F64), 2);
|
||||
static I64x4_F64: Type = Type::Vector(&I64, Some(&F64), 4);
|
||||
|
||||
static VOID: Type = Type::Void;
|
||||
|
||||
mod x86;
|
||||
mod arm;
|
||||
mod aarch64;
|
||||
mod nvptx;
|
||||
mod hexagon;
|
||||
mod powerpc;
|
||||
|
||||
impl Intrinsic {
|
||||
pub fn find(name: &str) -> Option<Intrinsic> {
|
||||
if name.starts_with("x86_") {
|
||||
x86::find(name)
|
||||
} else if name.starts_with("arm_") {
|
||||
arm::find(name)
|
||||
} else if name.starts_with("aarch64_") {
|
||||
aarch64::find(name)
|
||||
} else if name.starts_with("nvptx_") {
|
||||
nvptx::find(name)
|
||||
} else if name.starts_with("Q6_") {
|
||||
hexagon::find(name)
|
||||
} else if name.starts_with("powerpc_") {
|
||||
powerpc::find(name)
|
||||
} else {
|
||||
None
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,79 +0,0 @@
|
|||
// DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
|
||||
// ignore-tidy-linelength
|
||||
|
||||
#![allow(unused_imports)]
|
||||
|
||||
use {Intrinsic, Type};
|
||||
use IntrinsicDef::Named;
|
||||
|
||||
pub fn find(name: &str) -> Option<Intrinsic> {
|
||||
if !name.starts_with("nvptx") { return None }
|
||||
Some(match &name["nvptx".len()..] {
|
||||
"_syncthreads" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::VOID,
|
||||
definition: Named("llvm.cuda.syncthreads")
|
||||
},
|
||||
"_block_dim_x" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.ntid.x")
|
||||
},
|
||||
"_block_dim_y" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.ntid.y")
|
||||
},
|
||||
"_block_dim_z" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.ntid.z")
|
||||
},
|
||||
"_block_idx_x" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.ctaid.x")
|
||||
},
|
||||
"_block_idx_y" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.ctaid.y")
|
||||
},
|
||||
"_block_idx_z" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.ctaid.z")
|
||||
},
|
||||
"_grid_dim_x" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.nctaid.x")
|
||||
},
|
||||
"_grid_dim_y" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.nctaid.y")
|
||||
},
|
||||
"_grid_dim_z" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.nctaid.z")
|
||||
},
|
||||
"_thread_idx_x" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.tid.x")
|
||||
},
|
||||
"_thread_idx_y" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.tid.y")
|
||||
},
|
||||
"_thread_idx_z" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
|
||||
output: &::I32,
|
||||
definition: Named("llvm.nvvm.read.ptx.sreg.tid.z")
|
||||
},
|
||||
_ => return None,
|
||||
})
|
||||
}
|
||||
|
|
@ -1,439 +0,0 @@
|
|||
// DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
|
||||
// ignore-tidy-linelength
|
||||
|
||||
#![allow(unused_imports)]
|
||||
|
||||
use {Intrinsic, Type};
|
||||
use IntrinsicDef::Named;
|
||||
|
||||
pub fn find(name: &str) -> Option<Intrinsic> {
|
||||
if !name.starts_with("powerpc") { return None }
|
||||
Some(match &name["powerpc".len()..] {
|
||||
"_vec_perm" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I8x16]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vperm")
|
||||
},
|
||||
"_vec_mradds" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmhraddshs")
|
||||
},
|
||||
"_vec_cmpb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vcmpbfp")
|
||||
},
|
||||
"_vec_cmpeqb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vcmpequb")
|
||||
},
|
||||
"_vec_cmpeqh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vcmpequh")
|
||||
},
|
||||
"_vec_cmpeqw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vcmpequw")
|
||||
},
|
||||
"_vec_cmpgtub" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vcmpgtub")
|
||||
},
|
||||
"_vec_cmpgtuh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vcmpgtuh")
|
||||
},
|
||||
"_vec_cmpgtuw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vcmpgtuw")
|
||||
},
|
||||
"_vec_cmpgtsb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vcmpgtsb")
|
||||
},
|
||||
"_vec_cmpgtsh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vcmpgtsh")
|
||||
},
|
||||
"_vec_cmpgtsw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vcmpgtsw")
|
||||
},
|
||||
"_vec_maxsb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vmaxsb")
|
||||
},
|
||||
"_vec_maxub" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::U8x16,
|
||||
definition: Named("llvm.ppc.altivec.vmaxub")
|
||||
},
|
||||
"_vec_maxsh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmaxsh")
|
||||
},
|
||||
"_vec_maxuh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmaxuh")
|
||||
},
|
||||
"_vec_maxsw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmaxsw")
|
||||
},
|
||||
"_vec_maxuw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmaxuw")
|
||||
},
|
||||
"_vec_minsb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vminsb")
|
||||
},
|
||||
"_vec_minub" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::U8x16,
|
||||
definition: Named("llvm.ppc.altivec.vminub")
|
||||
},
|
||||
"_vec_minsh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vminsh")
|
||||
},
|
||||
"_vec_minuh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vminuh")
|
||||
},
|
||||
"_vec_minsw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vminsw")
|
||||
},
|
||||
"_vec_minuw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vminuw")
|
||||
},
|
||||
"_vec_subsbs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vsubsbs")
|
||||
},
|
||||
"_vec_sububs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::U8x16,
|
||||
definition: Named("llvm.ppc.altivec.vsububs")
|
||||
},
|
||||
"_vec_subshs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vsubshs")
|
||||
},
|
||||
"_vec_subuhs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vsubuhs")
|
||||
},
|
||||
"_vec_subsws" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsubsws")
|
||||
},
|
||||
"_vec_subuws" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsubuws")
|
||||
},
|
||||
"_vec_subc" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsubcuw")
|
||||
},
|
||||
"_vec_addsbs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vaddsbs")
|
||||
},
|
||||
"_vec_addubs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::U8x16,
|
||||
definition: Named("llvm.ppc.altivec.vaddubs")
|
||||
},
|
||||
"_vec_addshs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vaddshs")
|
||||
},
|
||||
"_vec_adduhs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vadduhs")
|
||||
},
|
||||
"_vec_addsws" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vaddsws")
|
||||
},
|
||||
"_vec_adduws" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vadduws")
|
||||
},
|
||||
"_vec_addc" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vaddcuw")
|
||||
},
|
||||
"_vec_mulesb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmulesb")
|
||||
},
|
||||
"_vec_muleub" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmuleub")
|
||||
},
|
||||
"_vec_mulesh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmulesh")
|
||||
},
|
||||
"_vec_muleuh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmuleuh")
|
||||
},
|
||||
"_vec_mulosb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmulosb")
|
||||
},
|
||||
"_vec_muloub" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmuloub")
|
||||
},
|
||||
"_vec_mulosh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmulosh")
|
||||
},
|
||||
"_vec_mulouh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmulouh")
|
||||
},
|
||||
"_vec_avgsb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vavgsb")
|
||||
},
|
||||
"_vec_avgub" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
|
||||
output: &::U8x16,
|
||||
definition: Named("llvm.ppc.altivec.vavgub")
|
||||
},
|
||||
"_vec_avgsh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vavgsh")
|
||||
},
|
||||
"_vec_avguh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vavguh")
|
||||
},
|
||||
"_vec_avgsw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vavgsw")
|
||||
},
|
||||
"_vec_avguw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vavguw")
|
||||
},
|
||||
"_vec_packssh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I8x16,
|
||||
definition: Named("llvm.ppc.altivec.vpkshss")
|
||||
},
|
||||
"_vec_packsuh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
|
||||
output: &::U8x16,
|
||||
definition: Named("llvm.ppc.altivec.vpkuhus")
|
||||
},
|
||||
"_vec_packssw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vpkswss")
|
||||
},
|
||||
"_vec_packsuw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vpkuwus")
|
||||
},
|
||||
"_vec_packsush" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::U8x16,
|
||||
definition: Named("llvm.ppc.altivec.vpkshus")
|
||||
},
|
||||
"_vec_packsusw" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::U16x8,
|
||||
definition: Named("llvm.ppc.altivec.vpkswus")
|
||||
},
|
||||
"_vec_packpx" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vpkpx")
|
||||
},
|
||||
"_vec_unpacklsb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vupklsb")
|
||||
},
|
||||
"_vec_unpacklsh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vupklsh")
|
||||
},
|
||||
"_vec_unpackhsb" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vupkhsb")
|
||||
},
|
||||
"_vec_unpackhsh" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vupkhsh")
|
||||
},
|
||||
"_vec_madds" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
|
||||
output: &::I16x8,
|
||||
definition: Named("llvm.ppc.altivec.vmhaddshs")
|
||||
},
|
||||
"_vec_msumubm" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmsumubm")
|
||||
},
|
||||
"_vec_msumuhm" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmsumuhm")
|
||||
},
|
||||
"_vec_msummbm" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, &::U8x16, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmsummbm")
|
||||
},
|
||||
"_vec_msumshm" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmsumshm")
|
||||
},
|
||||
"_vec_msumshs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmsumshs")
|
||||
},
|
||||
"_vec_msumuhs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmsumuhs")
|
||||
},
|
||||
"_vec_sum2s" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsum2sws")
|
||||
},
|
||||
"_vec_sum4sbs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsum4sbs")
|
||||
},
|
||||
"_vec_sum4ubs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U32x4]; &INPUTS },
|
||||
output: &::U32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsum4ubs")
|
||||
},
|
||||
"_vec_sum4shs" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsum4shs")
|
||||
},
|
||||
"_vec_sums" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
|
||||
output: &::I32x4,
|
||||
definition: Named("llvm.ppc.altivec.vsumsws")
|
||||
},
|
||||
"_vec_madd" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vmaddfp")
|
||||
},
|
||||
"_vec_nmsub" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vnmsubfp")
|
||||
},
|
||||
"_vec_expte" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vexptefp")
|
||||
},
|
||||
"_vec_floor" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vrfim")
|
||||
},
|
||||
"_vec_ceil" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vrfip")
|
||||
},
|
||||
"_vec_round" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vrfin")
|
||||
},
|
||||
"_vec_trunc" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vrfiz")
|
||||
},
|
||||
"_vec_loge" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vlogefp")
|
||||
},
|
||||
"_vec_re" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vrefp")
|
||||
},
|
||||
"_vec_rsqrte" => Intrinsic {
|
||||
inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
|
||||
output: &::F32x4,
|
||||
definition: Named("llvm.ppc.altivec.vrsqrtefp")
|
||||
},
|
||||
_ => return None,
|
||||
})
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -15,7 +15,6 @@ log = "0.4"
|
|||
rustc = { path = "../librustc" }
|
||||
rustc_data_structures = { path = "../librustc_data_structures" }
|
||||
rustc_errors = { path = "../librustc_errors" }
|
||||
rustc_platform_intrinsics = { path = "../librustc_platform_intrinsics" }
|
||||
rustc_target = { path = "../librustc_target" }
|
||||
smallvec = { version = "0.6.7", features = ["union", "may_dangle"] }
|
||||
syntax = { path = "../libsyntax" }
|
||||
|
|
|
|||
|
|
@ -1,17 +1,13 @@
|
|||
//! Type-checking for the rust-intrinsic and platform-intrinsic
|
||||
//! intrinsics that the compiler exposes.
|
||||
|
||||
use intrinsics;
|
||||
use rustc::traits::{ObligationCause, ObligationCauseCode};
|
||||
use rustc::ty::{self, TyCtxt, Ty};
|
||||
use rustc::ty::subst::Subst;
|
||||
use rustc::util::nodemap::FxHashMap;
|
||||
use require_same_types;
|
||||
|
||||
use rustc_target::spec::abi::Abi;
|
||||
use syntax::ast;
|
||||
use syntax::symbol::Symbol;
|
||||
use syntax_pos::Span;
|
||||
|
||||
use rustc::hir;
|
||||
|
||||
|
|
@ -402,8 +398,6 @@ pub fn check_platform_intrinsic_type<'a, 'tcx>(tcx: TyCtxt<'a, 'tcx, 'tcx>,
|
|||
tcx.mk_ty_param(n, name)
|
||||
};
|
||||
|
||||
let def_id = tcx.hir().local_def_id(it.id);
|
||||
let i_n_tps = tcx.generics_of(def_id).own_counts().types;
|
||||
let name = it.ident.as_str();
|
||||
|
||||
let (n_tps, inputs, output) = match &*name {
|
||||
|
|
@ -461,159 +455,12 @@ pub fn check_platform_intrinsic_type<'a, 'tcx>(tcx: TyCtxt<'a, 'tcx, 'tcx>,
|
|||
}
|
||||
}
|
||||
_ => {
|
||||
match intrinsics::Intrinsic::find(&name) {
|
||||
Some(intr) => {
|
||||
// this function is a platform specific intrinsic
|
||||
if i_n_tps != 0 {
|
||||
span_err!(tcx.sess, it.span, E0440,
|
||||
"platform-specific intrinsic has wrong number of type \
|
||||
parameters: found {}, expected 0",
|
||||
i_n_tps);
|
||||
return
|
||||
}
|
||||
|
||||
let mut structural_to_nomimal = FxHashMap::default();
|
||||
|
||||
let sig = tcx.fn_sig(def_id);
|
||||
let sig = sig.no_bound_vars().unwrap();
|
||||
if intr.inputs.len() != sig.inputs().len() {
|
||||
span_err!(tcx.sess, it.span, E0444,
|
||||
"platform-specific intrinsic has invalid number of \
|
||||
arguments: found {}, expected {}",
|
||||
sig.inputs().len(), intr.inputs.len());
|
||||
return
|
||||
}
|
||||
let input_pairs = intr.inputs.iter().zip(sig.inputs());
|
||||
for (i, (expected_arg, arg)) in input_pairs.enumerate() {
|
||||
match_intrinsic_type_to_type(tcx, &format!("argument {}", i + 1), it.span,
|
||||
&mut structural_to_nomimal, expected_arg, arg);
|
||||
}
|
||||
match_intrinsic_type_to_type(tcx, "return value", it.span,
|
||||
&mut structural_to_nomimal,
|
||||
&intr.output, sig.output());
|
||||
return
|
||||
}
|
||||
None => {
|
||||
span_err!(tcx.sess, it.span, E0441,
|
||||
"unrecognized platform-specific intrinsic function: `{}`", name);
|
||||
return;
|
||||
}
|
||||
}
|
||||
let msg = format!("unrecognized platform-specific intrinsic function: `{}`", name);
|
||||
tcx.sess.span_err(it.span, &msg);
|
||||
return;
|
||||
}
|
||||
};
|
||||
|
||||
equate_intrinsic_type(tcx, it, n_tps, Abi::PlatformIntrinsic, hir::Unsafety::Unsafe,
|
||||
inputs, output)
|
||||
}
|
||||
|
||||
// walk the expected type and the actual type in lock step, checking they're
|
||||
// the same, in a kinda-structural way, i.e., `Vector`s have to be simd structs with
|
||||
// exactly the right element type
|
||||
fn match_intrinsic_type_to_type<'a, 'tcx>(
|
||||
tcx: TyCtxt<'a, 'tcx, 'tcx>,
|
||||
position: &str,
|
||||
span: Span,
|
||||
structural_to_nominal: &mut FxHashMap<&'a intrinsics::Type, Ty<'tcx>>,
|
||||
expected: &'a intrinsics::Type, t: Ty<'tcx>)
|
||||
{
|
||||
use intrinsics::Type::*;
|
||||
|
||||
let simple_error = |real: &str, expected: &str| {
|
||||
span_err!(tcx.sess, span, E0442,
|
||||
"intrinsic {} has wrong type: found {}, expected {}",
|
||||
position, real, expected)
|
||||
};
|
||||
|
||||
match *expected {
|
||||
Void => match t.sty {
|
||||
ty::Tuple(ref v) if v.is_empty() => {},
|
||||
_ => simple_error(&format!("`{}`", t), "()"),
|
||||
},
|
||||
// (The width we pass to LLVM doesn't concern the type checker.)
|
||||
Integer(signed, bits, _llvm_width) => match (signed, bits, &t.sty) {
|
||||
(true, 8, &ty::Int(ast::IntTy::I8)) |
|
||||
(false, 8, &ty::Uint(ast::UintTy::U8)) |
|
||||
(true, 16, &ty::Int(ast::IntTy::I16)) |
|
||||
(false, 16, &ty::Uint(ast::UintTy::U16)) |
|
||||
(true, 32, &ty::Int(ast::IntTy::I32)) |
|
||||
(false, 32, &ty::Uint(ast::UintTy::U32)) |
|
||||
(true, 64, &ty::Int(ast::IntTy::I64)) |
|
||||
(false, 64, &ty::Uint(ast::UintTy::U64)) |
|
||||
(true, 128, &ty::Int(ast::IntTy::I128)) |
|
||||
(false, 128, &ty::Uint(ast::UintTy::U128)) => {},
|
||||
_ => simple_error(&format!("`{}`", t),
|
||||
&format!("`{}{n}`",
|
||||
if signed {"i"} else {"u"},
|
||||
n = bits)),
|
||||
},
|
||||
Float(bits) => match (bits, &t.sty) {
|
||||
(32, &ty::Float(ast::FloatTy::F32)) |
|
||||
(64, &ty::Float(ast::FloatTy::F64)) => {},
|
||||
_ => simple_error(&format!("`{}`", t),
|
||||
&format!("`f{n}`", n = bits)),
|
||||
},
|
||||
Pointer(ref inner_expected, ref _llvm_type, const_) => {
|
||||
match t.sty {
|
||||
ty::RawPtr(ty::TypeAndMut { ty, mutbl }) => {
|
||||
if (mutbl == hir::MutImmutable) != const_ {
|
||||
simple_error(&format!("`{}`", t),
|
||||
if const_ {"const pointer"} else {"mut pointer"})
|
||||
}
|
||||
match_intrinsic_type_to_type(tcx, position, span, structural_to_nominal,
|
||||
inner_expected, ty)
|
||||
}
|
||||
_ => simple_error(&format!("`{}`", t), "raw pointer"),
|
||||
}
|
||||
}
|
||||
Vector(ref inner_expected, ref _llvm_type, len) => {
|
||||
if !t.is_simd() {
|
||||
simple_error(&format!("non-simd type `{}`", t), "simd type");
|
||||
return;
|
||||
}
|
||||
let t_len = t.simd_size(tcx);
|
||||
if len as usize != t_len {
|
||||
simple_error(&format!("vector with length {}", t_len),
|
||||
&format!("length {}", len));
|
||||
return;
|
||||
}
|
||||
let t_ty = t.simd_type(tcx);
|
||||
{
|
||||
// check that a given structural type always has the same an intrinsic definition
|
||||
let previous = structural_to_nominal.entry(expected).or_insert(t);
|
||||
if *previous != t {
|
||||
// this gets its own error code because it is non-trivial
|
||||
span_err!(tcx.sess, span, E0443,
|
||||
"intrinsic {} has wrong type: found `{}`, expected `{}` which \
|
||||
was used for this vector type previously in this signature",
|
||||
position,
|
||||
t,
|
||||
*previous);
|
||||
return;
|
||||
}
|
||||
}
|
||||
match_intrinsic_type_to_type(tcx,
|
||||
position,
|
||||
span,
|
||||
structural_to_nominal,
|
||||
inner_expected,
|
||||
t_ty)
|
||||
}
|
||||
Aggregate(_flatten, ref expected_contents) => {
|
||||
match t.sty {
|
||||
ty::Tuple(contents) => {
|
||||
if contents.len() != expected_contents.len() {
|
||||
simple_error(&format!("tuple with length {}", contents.len()),
|
||||
&format!("tuple with length {}", expected_contents.len()));
|
||||
return
|
||||
}
|
||||
for (e, c) in expected_contents.iter().zip(contents) {
|
||||
match_intrinsic_type_to_type(tcx, position, span, structural_to_nominal,
|
||||
e, c)
|
||||
}
|
||||
}
|
||||
_ => simple_error(&format!("`{}`", t),
|
||||
"tuple"),
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -3369,180 +3369,6 @@ extern "platform-intrinsic" {
|
|||
```
|
||||
"##,
|
||||
|
||||
E0440: r##"
|
||||
A platform-specific intrinsic function has the wrong number of type
|
||||
parameters. Erroneous code example:
|
||||
|
||||
```compile_fail,E0440
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct f64x2(f64, f64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_pd<T>(x: f64x2) -> i32;
|
||||
// error: platform-specific intrinsic has wrong number of type
|
||||
// parameters
|
||||
}
|
||||
```
|
||||
|
||||
Please refer to the function declaration to see if it corresponds
|
||||
with yours. Example:
|
||||
|
||||
```
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct f64x2(f64, f64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_pd(x: f64x2) -> i32;
|
||||
}
|
||||
```
|
||||
"##,
|
||||
|
||||
E0441: r##"
|
||||
An unknown platform-specific intrinsic function was used. Erroneous
|
||||
code example:
|
||||
|
||||
```compile_fail,E0441
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_ep16(x: i16x8, y: i16x8) -> i16x8;
|
||||
// error: unrecognized platform-specific intrinsic function
|
||||
}
|
||||
```
|
||||
|
||||
Please verify that the function name wasn't misspelled, and ensure
|
||||
that it is declared in the rust source code (in the file
|
||||
src/librustc_platform_intrinsics/x86.rs). Example:
|
||||
|
||||
```
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i16x8, y: i16x8) -> i16x8; // ok!
|
||||
}
|
||||
```
|
||||
"##,
|
||||
|
||||
E0442: r##"
|
||||
Intrinsic argument(s) and/or return value have the wrong type.
|
||||
Erroneous code example:
|
||||
|
||||
```compile_fail,E0442
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i8x16(i8, i8, i8, i8, i8, i8, i8, i8,
|
||||
i8, i8, i8, i8, i8, i8, i8, i8);
|
||||
#[repr(simd)]
|
||||
struct i32x4(i32, i32, i32, i32);
|
||||
#[repr(simd)]
|
||||
struct i64x2(i64, i64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
// error: intrinsic arguments/return value have wrong type
|
||||
}
|
||||
```
|
||||
|
||||
To fix this error, please refer to the function declaration to give
|
||||
it the awaited types. Example:
|
||||
|
||||
```
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i16x8, y: i16x8) -> i16x8; // ok!
|
||||
}
|
||||
```
|
||||
"##,
|
||||
|
||||
E0443: r##"
|
||||
Intrinsic argument(s) and/or return value have the wrong type.
|
||||
Erroneous code example:
|
||||
|
||||
```compile_fail,E0443
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
#[repr(simd)]
|
||||
struct i64x8(i64, i64, i64, i64, i64, i64, i64, i64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i16x8, y: i16x8) -> i64x8;
|
||||
// error: intrinsic argument/return value has wrong type
|
||||
}
|
||||
```
|
||||
|
||||
To fix this error, please refer to the function declaration to give
|
||||
it the awaited types. Example:
|
||||
|
||||
```
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i16x8, y: i16x8) -> i16x8; // ok!
|
||||
}
|
||||
```
|
||||
"##,
|
||||
|
||||
E0444: r##"
|
||||
A platform-specific intrinsic function has wrong number of arguments.
|
||||
Erroneous code example:
|
||||
|
||||
```compile_fail,E0444
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct f64x2(f64, f64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_pd(x: f64x2, y: f64x2, z: f64x2) -> i32;
|
||||
// error: platform-specific intrinsic has invalid number of arguments
|
||||
}
|
||||
```
|
||||
|
||||
Please refer to the function declaration to see if it corresponds
|
||||
with yours. Example:
|
||||
|
||||
```
|
||||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct f64x2(f64, f64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_pd(x: f64x2) -> i32; // ok!
|
||||
}
|
||||
```
|
||||
"##,
|
||||
|
||||
E0516: r##"
|
||||
The `typeof` keyword is currently reserved but unimplemented.
|
||||
Erroneous code example:
|
||||
|
|
|
|||
|
|
@ -82,7 +82,6 @@ extern crate syntax_pos;
|
|||
extern crate arena;
|
||||
|
||||
#[macro_use] extern crate rustc;
|
||||
extern crate rustc_platform_intrinsics as intrinsics;
|
||||
extern crate rustc_data_structures;
|
||||
extern crate rustc_errors as errors;
|
||||
extern crate rustc_target;
|
||||
|
|
|
|||
|
|
@ -1,24 +0,0 @@
|
|||
// run-pass
|
||||
#![allow(stable_features)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
// Test that removed LLVM SIMD intrinsics continue
|
||||
// to work via the "AutoUpgrade" mechanism.
|
||||
|
||||
#![feature(cfg_target_feature, repr_simd)]
|
||||
#![feature(platform_intrinsics, stmt_expr_attributes)]
|
||||
|
||||
#[repr(simd)]
|
||||
#[derive(PartialEq, Debug)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
|
||||
fn main() {
|
||||
#[cfg(target_feature = "sse2")] unsafe {
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_min_epi16(x: i16x8, y: i16x8) -> i16x8;
|
||||
}
|
||||
assert_eq!(x86_mm_min_epi16(i16x8(0, 1, 2, 3, 4, 5, 6, 7),
|
||||
i16x8(7, 6, 5, 4, 3, 2, 1, 0)),
|
||||
i16x8(0, 1, 2, 3, 3, 2, 1, 0));
|
||||
};
|
||||
}
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct f64x2(f64, f64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_pd<T>(x: f64x2) -> i32; //~ ERROR E0440
|
||||
}
|
||||
|
||||
fn main () {
|
||||
}
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
error[E0440]: platform-specific intrinsic has wrong number of type parameters: found 1, expected 0
|
||||
--> $DIR/E0440.rs:9:5
|
||||
|
|
||||
LL | fn x86_mm_movemask_pd<T>(x: f64x2) -> i32; //~ ERROR E0440
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to previous error
|
||||
|
||||
For more information about this error, try `rustc --explain E0440`.
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_ep16(x: i16x8, y: i16x8) -> i16x8; //~ ERROR E0441
|
||||
}
|
||||
|
||||
fn main() {}
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
error[E0441]: unrecognized platform-specific intrinsic function: `x86_mm_adds_ep16`
|
||||
--> $DIR/E0441.rs:9:5
|
||||
|
|
||||
LL | fn x86_mm_adds_ep16(x: i16x8, y: i16x8) -> i16x8; //~ ERROR E0441
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to previous error
|
||||
|
||||
For more information about this error, try `rustc --explain E0441`.
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i8x16(i8, i8, i8, i8, i8, i8, i8, i8,
|
||||
i8, i8, i8, i8, i8, i8, i8, i8);
|
||||
#[repr(simd)]
|
||||
struct i32x4(i32, i32, i32, i32);
|
||||
#[repr(simd)]
|
||||
struct i64x2(i64, i64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
//~^ ERROR E0442
|
||||
//~| ERROR E0442
|
||||
//~| ERROR E0442
|
||||
}
|
||||
|
||||
fn main() {}
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
error[E0442]: intrinsic argument 1 has wrong type: found vector with length 16, expected length 8
|
||||
--> $DIR/E0442.rs:14:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 2 has wrong type: found vector with length 4, expected length 8
|
||||
--> $DIR/E0442.rs:14:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic return value has wrong type: found vector with length 2, expected length 8
|
||||
--> $DIR/E0442.rs:14:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to 3 previous errors
|
||||
|
||||
For more information about this error, try `rustc --explain E0442`.
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
#[repr(simd)]
|
||||
struct i64x8(i64, i64, i64, i64, i64, i64, i64, i64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i16x8, y: i16x8) -> i64x8; //~ ERROR E0443
|
||||
}
|
||||
|
||||
fn main() {}
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
error[E0443]: intrinsic return value has wrong type: found `i64x8`, expected `i16x8` which was used for this vector type previously in this signature
|
||||
--> $DIR/E0443.rs:11:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: i16x8, y: i16x8) -> i64x8; //~ ERROR E0443
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to previous error
|
||||
|
||||
For more information about this error, try `rustc --explain E0443`.
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
#![feature(repr_simd)]
|
||||
#![feature(platform_intrinsics)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct f64x2(f64, f64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_pd(x: f64x2, y: f64x2, z: f64x2) -> i32; //~ ERROR E0444
|
||||
}
|
||||
|
||||
fn main() {}
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
error[E0444]: platform-specific intrinsic has invalid number of arguments: found 3, expected 1
|
||||
--> $DIR/E0444.rs:9:5
|
||||
|
|
||||
LL | fn x86_mm_movemask_pd(x: f64x2, y: f64x2, z: f64x2) -> i32; //~ ERROR E0444
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to previous error
|
||||
|
||||
For more information about this error, try `rustc --explain E0444`.
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
// Test number of arguments in platform-specific intrinsic function
|
||||
// This is the error E0444
|
||||
|
||||
#![feature(repr_simd, platform_intrinsics)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct f64x2(f64, f64);
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_pd(x: f64x2, y: f64x2, z: f64x2) -> i32; //~ platform-specific intrinsic
|
||||
}
|
||||
|
||||
pub fn main() {
|
||||
}
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
error[E0444]: platform-specific intrinsic has invalid number of arguments: found 3, expected 1
|
||||
--> $DIR/intrinsic-invalid-number-of-arguments.rs:11:5
|
||||
|
|
||||
LL | fn x86_mm_movemask_pd(x: f64x2, y: f64x2, z: f64x2) -> i32; //~ platform-specific intrinsic
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to previous error
|
||||
|
||||
For more information about this error, try `rustc --explain E0444`.
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#![feature(platform_intrinsics)]
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_movemask_ps() -> i32; //~ERROR found 0, expected 1
|
||||
}
|
||||
|
||||
fn main() { }
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
error[E0444]: platform-specific intrinsic has invalid number of arguments: found 0, expected 1
|
||||
--> $DIR/platform-intrinsic-params.rs:3:5
|
||||
|
|
||||
LL | fn x86_mm_movemask_ps() -> i32; //~ERROR found 0, expected 1
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to previous error
|
||||
|
||||
For more information about this error, try `rustc --explain E0444`.
|
||||
|
|
@ -1,59 +0,0 @@
|
|||
#![feature(repr_simd, platform_intrinsics)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct i16x8(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
#[repr(simd)]
|
||||
struct u16x8(u16, u16, u16, u16, u16, u16, u16, u16);
|
||||
|
||||
#[repr(simd)]
|
||||
struct i8x16(i8, i8, i8, i8, i8, i8, i8, i8,
|
||||
i8, i8, i8, i8, i8, i8, i8, i8);
|
||||
#[repr(simd)]
|
||||
struct i32x4(i32, i32, i32, i32);
|
||||
#[repr(simd)]
|
||||
struct f32x4(f32, f32, f32, f32);
|
||||
#[repr(simd)]
|
||||
struct i64x2(i64, i64);
|
||||
|
||||
// correct signatures work well
|
||||
mod right {
|
||||
use {i16x8, u16x8};
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i16x8, y: i16x8) -> i16x8;
|
||||
fn x86_mm_adds_epu16(x: u16x8, y: u16x8) -> u16x8;
|
||||
}
|
||||
}
|
||||
// but incorrect ones don't.
|
||||
|
||||
mod signedness {
|
||||
use {i16x8, u16x8};
|
||||
// signedness matters
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: u16x8, y: u16x8) -> u16x8;
|
||||
//~^ ERROR intrinsic argument 1 has wrong type
|
||||
//~^^ ERROR intrinsic argument 2 has wrong type
|
||||
//~^^^ ERROR intrinsic return value has wrong type
|
||||
fn x86_mm_adds_epu16(x: i16x8, y: i16x8) -> i16x8;
|
||||
//~^ ERROR intrinsic argument 1 has wrong type
|
||||
//~^^ ERROR intrinsic argument 2 has wrong type
|
||||
//~^^^ ERROR intrinsic return value has wrong type
|
||||
}
|
||||
}
|
||||
// as do lengths
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
//~^ ERROR intrinsic argument 1 has wrong type
|
||||
//~^^ ERROR intrinsic argument 2 has wrong type
|
||||
//~^^^ ERROR intrinsic return value has wrong type
|
||||
}
|
||||
// and so does int vs. float:
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_max_ps(x: i32x4, y: i32x4) -> i32x4;
|
||||
//~^ ERROR intrinsic argument 1 has wrong type
|
||||
//~^^ ERROR intrinsic argument 2 has wrong type
|
||||
//~^^^ ERROR intrinsic return value has wrong type
|
||||
}
|
||||
|
||||
|
||||
fn main() {}
|
||||
|
|
@ -1,75 +0,0 @@
|
|||
error[E0442]: intrinsic argument 1 has wrong type: found vector with length 16, expected length 8
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:45:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 2 has wrong type: found vector with length 4, expected length 8
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:45:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic return value has wrong type: found vector with length 2, expected length 8
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:45:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: i8x16, y: i32x4) -> i64x2;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 1 has wrong type: found `i32`, expected `f32`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:52:5
|
||||
|
|
||||
LL | fn x86_mm_max_ps(x: i32x4, y: i32x4) -> i32x4;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 2 has wrong type: found `i32`, expected `f32`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:52:5
|
||||
|
|
||||
LL | fn x86_mm_max_ps(x: i32x4, y: i32x4) -> i32x4;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic return value has wrong type: found `i32`, expected `f32`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:52:5
|
||||
|
|
||||
LL | fn x86_mm_max_ps(x: i32x4, y: i32x4) -> i32x4;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 1 has wrong type: found `u16`, expected `i16`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:33:9
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: u16x8, y: u16x8) -> u16x8;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 2 has wrong type: found `u16`, expected `i16`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:33:9
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: u16x8, y: u16x8) -> u16x8;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic return value has wrong type: found `u16`, expected `i16`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:33:9
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: u16x8, y: u16x8) -> u16x8;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 1 has wrong type: found `i16`, expected `u16`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:37:9
|
||||
|
|
||||
LL | fn x86_mm_adds_epu16(x: i16x8, y: i16x8) -> i16x8;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic argument 2 has wrong type: found `i16`, expected `u16`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:37:9
|
||||
|
|
||||
LL | fn x86_mm_adds_epu16(x: i16x8, y: i16x8) -> i16x8;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0442]: intrinsic return value has wrong type: found `i16`, expected `u16`
|
||||
--> $DIR/simd-intrinsic-declaration-type.rs:37:9
|
||||
|
|
||||
LL | fn x86_mm_adds_epu16(x: i16x8, y: i16x8) -> i16x8;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to 12 previous errors
|
||||
|
||||
For more information about this error, try `rustc --explain E0442`.
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#![feature(repr_simd, platform_intrinsics)]
|
||||
|
||||
#[repr(simd)]
|
||||
struct A(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
#[repr(simd)]
|
||||
struct B(i16, i16, i16, i16, i16, i16, i16, i16);
|
||||
|
||||
// each intrinsic definition has to use the same nominal type for any
|
||||
// vector structure throughout that declaration (i.e., every instance
|
||||
// of i16x8 in each `fn ...;` needs to be either A or B)
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn x86_mm_adds_epi16(x: A, y: A) -> B;
|
||||
//~^ ERROR intrinsic return value has wrong type: found `B`, expected `A`
|
||||
fn x86_mm_subs_epi16(x: A, y: B) -> A;
|
||||
//~^ ERROR intrinsic argument 2 has wrong type: found `B`, expected `A`
|
||||
|
||||
// ok:
|
||||
fn x86_mm_max_epi16(x: B, y: B) -> B;
|
||||
fn x86_mm_min_epi16(x: A, y: A) -> A;
|
||||
}
|
||||
|
||||
fn main() {}
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
error[E0443]: intrinsic return value has wrong type: found `B`, expected `A` which was used for this vector type previously in this signature
|
||||
--> $DIR/simd-intrinsic-single-nominal-type.rs:13:5
|
||||
|
|
||||
LL | fn x86_mm_adds_epi16(x: A, y: A) -> B;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error[E0443]: intrinsic argument 2 has wrong type: found `B`, expected `A` which was used for this vector type previously in this signature
|
||||
--> $DIR/simd-intrinsic-single-nominal-type.rs:15:5
|
||||
|
|
||||
LL | fn x86_mm_subs_epi16(x: A, y: B) -> A;
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to 2 previous errors
|
||||
|
||||
For more information about this error, try `rustc --explain E0443`.
|
||||
Loading…
Reference in New Issue