[RISCV] Enable CI.
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302ddef1ac
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@ -61,7 +61,7 @@
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# the same format as above, but since these targets are experimental, they are
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# not built by default and the experimental Rust compilation targets that depend
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# on them will not work unless the user opts in to building them. By default the
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# `WebAssembly` target is enabled when compiling LLVM from scratch.
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# `WebAssembly` and `RISCV` targets are enabled when compiling LLVM from scratch.
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#experimental-targets = "WebAssembly;RISCV"
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# Cap the number of parallel linker invocations when compiling LLVM.
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@ -507,7 +507,7 @@ impl Config {
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set(&mut config.llvm_link_shared, llvm.link_shared);
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config.llvm_targets = llvm.targets.clone();
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config.llvm_experimental_targets = llvm.experimental_targets.clone()
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.unwrap_or("WebAssembly".to_string());
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.unwrap_or("WebAssembly;RISCV".to_string());
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config.llvm_link_jobs = llvm.link_jobs;
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config.llvm_clang_cl = llvm.clang_cl.clone();
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}
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@ -102,6 +102,7 @@ ENV TARGETS=$TARGETS,thumbv6m-none-eabi
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ENV TARGETS=$TARGETS,thumbv7m-none-eabi
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ENV TARGETS=$TARGETS,thumbv7em-none-eabi
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ENV TARGETS=$TARGETS,thumbv7em-none-eabihf
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ENV TARGETS=$TARGETS,riscv32imac-unknown-none-elf
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ENV CC_mipsel_unknown_linux_musl=mipsel-openwrt-linux-gcc \
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CC_mips_unknown_linux_musl=mips-openwrt-linux-gcc \
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@ -89,6 +89,7 @@ static TARGETS: &'static [&'static str] = &[
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"powerpc64-unknown-linux-gnu",
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"powerpc64le-unknown-linux-gnu",
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"powerpc64le-unknown-linux-musl",
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"riscv32imac-unknown-none-elf",
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"s390x-unknown-linux-gnu",
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"sparc-unknown-linux-gnu",
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"sparc64-unknown-linux-gnu",
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