Fix undefined behavior in hint::spin_loop for x86 targets without SSE2
The pause instruction requires SSE2 but was being unconditionally used on targets without it, resulting in undefined behavior. This PR fixes that by only using the pause intrinsic if SSE2 is available. It also removes the inline assembly which was not required since these instructions are available in core::arch, and extends support of the spin_loop hint to arm targets with the v6 feature which also support the yield instruction. Closes #59237 .
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@ -62,13 +62,32 @@ pub unsafe fn unreachable_unchecked() -> ! {
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#[inline]
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#[unstable(feature = "renamed_spin_loop", issue = "55002")]
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pub fn spin_loop() {
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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unsafe {
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asm!("pause" ::: "memory" : "volatile");
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#[cfg(
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all(
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any(target_arch = "x86", target_arch = "x86_64"),
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target_feature = "sse2"
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)
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)] {
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#[cfg(target_arch = "x86")] {
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unsafe { crate::arch::x86::_mm_pause() };
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}
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#[cfg(target_arch = "x86_64")] {
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unsafe { crate::arch::x86_64::_mm_pause() };
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}
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}
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#[cfg(target_arch = "aarch64")]
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unsafe {
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asm!("yield" ::: "memory" : "volatile");
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#[cfg(
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any(
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target_arch = "aarch64",
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all(target_arch = "arm", target_feature = "v6")
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)
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)] {
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#[cfg(target_arch = "aarch64")] {
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unsafe { crate::arch::aarch64::__yield() };
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}
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#[cfg(target_arch = "arm")] {
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unsafe { crate::arch::arm::__yield() };
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}
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}
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}
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