From 8872163b32011dd546e69d349d9c5de22cc218b8 Mon Sep 17 00:00:00 2001 From: Ruud van Asseldonk Date: Sat, 5 Mar 2016 15:52:08 +0100 Subject: [PATCH] Define x86 fused multiply-add intrinsics This defines the following intrinsics for 128 and 256 bit vectors of f32 and f64: * `fmadd` * `fmaddsub` * `fmsub` * `fmsubadd` * `fnmadd` * `fnmsub` The `_sd` and `_ss` variants are not included yet. Intel intrinsic reference: https://software.intel.com/en-us/node/523929 The intrinsics there are listed under AVX2, but in the Intel Intrinsic Guide they are part of the "FMA" technology, and LLVM puts them under FMA, not AVX2. --- src/etc/platform-intrinsics/x86/fma.json | 47 ++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 src/etc/platform-intrinsics/x86/fma.json diff --git a/src/etc/platform-intrinsics/x86/fma.json b/src/etc/platform-intrinsics/x86/fma.json new file mode 100644 index 00000000000..c922d166c8f --- /dev/null +++ b/src/etc/platform-intrinsics/x86/fma.json @@ -0,0 +1,47 @@ +{ + "llvm_prefix": "llvm.x86.fma.", + "intrinsics": [ + { + "intrinsic": "{0.width_mm}_fmadd_{0.data_type}", + "width": [128, 256], + "llvm": "vfmadd.{0.data_type_short}{0.width_suffix}", + "ret": "f(32-64)", + "args": ["0", "0", "0"] + }, + { + "intrinsic": "{0.width_mm}_fmaddsub_{0.data_type}", + "width": [128, 256], + "llvm": "vfmaddsub.{0.data_type_short}{0.width_suffix}", + "ret": "f(32-64)", + "args": ["0", "0", "0"] + }, + { + "intrinsic": "{0.width_mm}_fmsub_{0.data_type}", + "width": [128, 256], + "llvm": "vfmsub.{0.data_type_short}{0.width_suffix}", + "ret": "f(32-64)", + "args": ["0", "0", "0"] + }, + { + "intrinsic": "{0.width_mm}_fmsubadd_{0.data_type}", + "width": [128, 256], + "llvm": "vfmsubadd.{0.data_type_short}{0.width_suffix}", + "ret": "f(32-64)", + "args": ["0", "0", "0"] + }, + { + "intrinsic": "{0.width_mm}_fnmadd_{0.data_type}", + "width": [128, 256], + "llvm": "vfnmadd.{0.data_type_short}{0.width_suffix}", + "ret": "f(32-64)", + "args": ["0", "0", "0"] + }, + { + "intrinsic": "{0.width_mm}_fnmsub_{0.data_type}", + "width": [128, 256], + "llvm": "vfnmsub.{0.data_type_short}{0.width_suffix}", + "ret": "f(32-64)", + "args": ["0", "0", "0"] + } + ] +}