[RISCV] Implement call abi.

This commit is contained in:
David Craven 2018-07-24 12:04:17 +02:00
parent 2d5f62fb48
commit a6bd5ae57e
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2 changed files with 62 additions and 0 deletions

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@ -23,6 +23,7 @@ mod nvptx;
mod nvptx64; mod nvptx64;
mod powerpc; mod powerpc;
mod powerpc64; mod powerpc64;
mod riscv;
mod s390x; mod s390x;
mod sparc; mod sparc;
mod sparc64; mod sparc64;
@ -500,6 +501,8 @@ impl<'a, Ty> FnType<'a, Ty> {
"nvptx" => nvptx::compute_abi_info(self), "nvptx" => nvptx::compute_abi_info(self),
"nvptx64" => nvptx64::compute_abi_info(self), "nvptx64" => nvptx64::compute_abi_info(self),
"hexagon" => hexagon::compute_abi_info(self), "hexagon" => hexagon::compute_abi_info(self),
"riscv32" => riscv::compute_abi_info(self, 32),
"riscv64" => riscv::compute_abi_info(self, 64),
a => return Err(format!("unrecognized arch \"{}\" in target specification", a)) a => return Err(format!("unrecognized arch \"{}\" in target specification", a))
} }

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@ -0,0 +1,59 @@
// Copyright 2012-2013 The Rust Project Developers. See the COPYRIGHT
// file at the top-level directory of this distribution and at
// http://rust-lang.org/COPYRIGHT.
//
// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
// option. This file may not be copied, modified, or distributed
// except according to those terms.
// Reference: RISC-V ELF psABI specification
// https://github.com/riscv/riscv-elf-psabi-doc
use abi::call::{ArgType, FnType};
fn classify_ret_ty<Ty>(arg: &mut ArgType<Ty>, xlen: u64) {
// "Scalars wider than 2✕XLEN are passed by reference and are replaced in
// the argument list with the address."
// "Aggregates larger than 2✕XLEN bits are passed by reference and are
// replaced in the argument list with the address, as are C++ aggregates
// with nontrivial copy constructors, destructors, or vtables."
if arg.layout.size.bits() > 2 * xlen {
arg.make_indirect();
}
// "When passed in registers, scalars narrower than XLEN bits are widened
// according to the sign of their type up to 32 bits, then sign-extended to
// XLEN bits."
arg.extend_integer_width_to(xlen); // this method only affects integer scalars
}
fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>, xlen: u64) {
// "Scalars wider than 2✕XLEN are passed by reference and are replaced in
// the argument list with the address."
// "Aggregates larger than 2✕XLEN bits are passed by reference and are
// replaced in the argument list with the address, as are C++ aggregates
// with nontrivial copy constructors, destructors, or vtables."
if arg.layout.size.bits() > 2 * xlen {
arg.make_indirect();
}
// "When passed in registers, scalars narrower than XLEN bits are widened
// according to the sign of their type up to 32 bits, then sign-extended to
// XLEN bits."
arg.extend_integer_width_to(xlen); // this method only affects integer scalars
}
pub fn compute_abi_info<Ty>(fty: &mut FnType<Ty>, xlen: u64) {
if !fty.ret.is_ignore() {
classify_ret_ty(&mut fty.ret, xlen);
}
for arg in &mut fty.args {
if arg.is_ignore() {
continue;
}
classify_arg_ty(arg, xlen);
}
}