Add support for Vector Add Carryout on PowerPC

This commit is contained in:
Luca Barbato 2017-08-04 00:19:58 +00:00
parent 381cbe4994
commit bb47972d4c
2 changed files with 12 additions and 0 deletions

View File

@ -93,6 +93,13 @@
"llvm": "vadd{0.kind}{0.data_type_short}s",
"ret": "i(8-32)",
"args": ["0", "0"]
},
{
"intrinsic": "addc",
"width": [128],
"llvm": "vaddcuw",
"ret": "u32",
"args": ["0", "0"]
}
]
}

View File

@ -207,6 +207,11 @@ pub fn find(name: &str) -> Option<Intrinsic> {
output: &::U32x4,
definition: Named("llvm.ppc.altivec.vadduws")
},
"_vec_addc" => Intrinsic {
inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
output: &::U32x4,
definition: Named("llvm.ppc.altivec.vaddcuw")
},
_ => return None,
})
}