diff --git a/src/Makefile b/src/Makefile
index 25e22a0cfeb..9d6eed19b64 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -429,6 +429,7 @@ TEST_XFAILS_LLVM := $(addprefix test/run-pass/, \
                       generic-tag.rs \
                       import.rs \
                       inner-module.rs \
+                      iter-range.rs \
                       large-records.rs \
                       lazy-and-or.rs \
                       lazy-init.rs \
diff --git a/src/boot/me/trans.ml b/src/boot/me/trans.ml
index d8128196717..be7adc1a8f5 100644
--- a/src/boot/me/trans.ml
+++ b/src/boot/me/trans.ml
@@ -4343,8 +4343,15 @@ let trans_visitor
             trans_vec_append dst_cell dst_ty src_oper (atom_type cx a_src)
         | _ ->
             let (dst_cell, _) = deref_ty DEREF_none false dst_cell dst_ty in
+            let bits = Il.operand_bits word_bits src_oper in
+              (* 
+               * FIXME: X86-ism going via a vreg; mem op= mem doesn't work and
+               * IL lacks sufficient brains to cope just now.
+               *)
+            let src = Il.Reg (Il.next_vreg (emitter()), Il.ValTy bits) in
             let op = trans_binop binop in
-              emit (Il.binary op dst_cell (Il.Cell dst_cell) src_oper);
+              mov src src_oper;
+              emit (Il.binary op dst_cell (Il.Cell dst_cell) (Il.Cell src));
 
 
   and trans_call id dst flv args =
diff --git a/src/test/run-pass/iter-range.rs b/src/test/run-pass/iter-range.rs
new file mode 100644
index 00000000000..ade7c51c6ab
--- /dev/null
+++ b/src/test/run-pass/iter-range.rs
@@ -0,0 +1,18 @@
+iter range(int a, int b) -> int {
+  check (a < b);
+
+  let int i = a;
+  while (i < b) {
+    put i;
+    i += 1;
+  }
+}
+
+fn main() {
+  let int sum = 0;
+  for each (int x in range(0, 100)) {
+    sum += x;
+  }
+
+  log sum;
+}
\ No newline at end of file